Test Points Descriptions - SiTime SiT6502EB User Manual

SiT6502EB Evaluation Board (EVB) HW User Manual
Connector Designators
Header for internal use only
PullUp vs PullDown switch
Headers
Signals switch Header
PLL supply voltage source
switching Header
PLL supply voltage levels
switching Header
Left supply voltage source
switching Header
Left supply voltage levels
switching Header
FTDI supply voltages source
switching Header
FTDI supply voltage levels
switching Header
USB – External Power sources
switching Headers
Outputs supply voltage
source switching Header
Outputs supply voltage levels
switching Header
5

Test Points Descriptions

Table 2 describes all Test Point (TP)s on the EVB.
Table 2. SiT6502EB Test Points description
Connector Designators
GND Test Points
Reference Clock Test Point
Test Points for internal use only
SiT6502EB HW UM Preliminary Rev 1.0
Description
10-pin Header (J76)
(Default Jumper position see in
3-pin Headers (J67 through J69, J72 through J74, J75, J81,
JVDD1)
3-pin Header (J71)
3-pin Header (J31)
3-pin Header (J32)
3-pin Header (J8)
3-pin Header (J9)
3-pin Header (J78)
3-pin Header (J30)
3-pin Headers (J79, J6)
3-pin Headers (J10, J77, J14, J16, J18, J20, J22, J24, J26, J28)
3-pin Headers (J11, J13, J15, J17, J19, J21, J23, J25, J27, J29)
Description
1-pin Headers (TP1, TP3, TP4, TP5, TP7)
1-pin Header (TP6)
1-pin Headers (TP2, TP8, J82 through J86)
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Figure A20)
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