Holtek HT66F60A Manual page 216

Mnemonic
Branch
LSZ [m] Skip if Data Memory is zero
LSZ� [m] Skip if Data Memory is zero with data movement to �CC
LSNZ [m] Skip if Data Memory is not zero
LSZ [m].i Skip if bit i of Data Memory is zero
LSNZ [m].i Skip if bit i of Data Memory is not zero
LSIZ [m] Skip if increment Data Memory is zero
LSDZ [m] Skip if decrement Data Memory is zero
LSIZ� [m] Skip if increment Data Memory is zero with res�lt in �CC
LSDZ� [m] Skip if decrement Data Memory is zero with res�lt in �CC
Table Read
LT�BRD [m] Read table to TBLH and Data Memory
LT�BRDL [m] Read table (last pa�e) to TBLH and Data Memory
LIT�BRD [m] Increment table pointer TBLP first and Read table to TBLH and Data Memory
Increment table pointer TBLP first and Read table (last page) to TBLH and
LIT�BRDL [m]
Data Memory
Miscellaneous
LCLR [m] Clear Data Memory
LSET [m] Set Data Memory
LSW�P [m] Swap nibbles of Data Memory
LSW�P� [m] Swap nibbles of Data Memory with res�lt in �CC
Note: 1. For these extended skip instructions, if the result of the comparison involves a skip then up to four cycles
are required, if no skip takes place two cycles is required.
2. Any extended instruction which changes the contents of the PCL register will also require three cycles for
execution.
Rev. 1.40
A/D Flash MCU with EEPROM
Description
�16
HT66F60A/HT66F70A
Cycles Flag Affected
� Note None
� Note None
� Note None
� Note None
� Note None
� Note None
� Note None
� Note None
� Note None
3 Note None
3 Note None
3 Note None
3 Note None
� Note None
� Note None
� Note None
� None
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