Digital Pfc Firmware Execution; Figure 29. Pfc Firmware Flowchart - ST STM32F103ZE User Manual

1.4 kw digital power factor corrector
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Digital PFC firmware
6.4

Digital PFC firmware execution

Figure 29
shows the sequence of events for the digital PFC firmware.

Figure 29. PFC firmware flowchart

The timing of the PFC is explained in
38/62
www.BDTIC.com/ST
PFC Configuration
wait for charging of PFC
output capacitors
read mains frequency
Is mains
frequency
Ye
out of
range?
s
No
enable timer for ADC
trigger
by-pass resistor against
in-rush current
wait for relay stabilization
enable PFC protections
enable PFC routine
execution
wait until all PFC inputs
have been read
PFC routine
Has any
software
protection
No
happened?
Ye
s
stop PFC
Figure 30
Doc ID 16854 Rev 1
Has any
hardware
protection
No
happened?
Ye
s
.
UM0877

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