Usb Interface; Power Management; Input Data - Texas Instruments DAC5668 Manual

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REFERENCE
DESIGNATOR
J19 OUTCLK1 Y4B
J20 EXT_VCXO
J21 DAC CLKOUT
J22 EXT_REF_CLK
J23 RF_LO_IN
4.3

USB Interface

The DAC5668/88/89EVM contains a USB connector to interface to a USB 1.1 or later compliant USB port.
Programming of the CDCM7005 and DAC is accomplished through this port.
4.4

Power Management

The DAC5668/88/89EVM requires 1.8-V and 3.3-V supplies for normal operation. An additional 5-V supply
is required to power up the TRF3703 for RF measurements.
4.5

Input Data

The DAC5668/88/89EVM can accept 1.8-V or 3.3-V CMOS logic levels data inputs through the 34-pin
headers J2 and J7 per
digital ringing and switching noise. The DAC logic level is selected through software.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Pin
1
2
3
4
5
SLAU241A – June 2008 – Revised March 2010
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Table 3. Input and Output Connections (continued)
LABEL CONNECTOR
TYPE
SMA
SMA
SMA
SMA
SMA
Table 4 and Table 5. The board provides series dampening resistors to minimize
Table 4. Input Data Connector J2 – Data A Bus
Description
CMOS data bit 15 (MSB)
GND
CMOS data bit 14
GND
CMOS data bit 13
GND
CMOS data bit 12
GND
CMOS data bit 11
GND
CMOS data bit 10
GND
CMOS data bit 9
GND
CMOS data bit 8
GND
CMOS data bit 7
Table 5. Input Data Connector J7 – Data B Bus
Description
CMOS data bit 0 (LSB)
GND
CMOS data bit 1
GND
CMOS data bit 2
Copyright © 2008–2010, Texas Instruments Incorporated
DAC5668/88/89 Hardware Description
DESCRIPTION
Optional CDCM7005 clock output.
External main clock input.
CLKOUT output from DAC.
External reference clock input.
TRF3703 LO source input.
Pin Description
18 GND
19 CMOS data bit 6
20 GND
21 CMOS data bit 5
22 GND
23 CMOS data bit 4
24 GND
25 CMOS data bit 3
26 GND
27 CMOS data bit 2
28 GND
29 CMOS data bit 1
30 GND
31 CMOS data bit 0 (LSB)
32 GND
33 SYNC
34 GND
Pin Description
18 GND
19 CMOS data bit 9
20 GND
21 CMOS data bit 10
22 GND
7
DAC5668/88/89EVM