Texas Instruments DAC5686 EVM User Manual
Texas Instruments DAC5686 EVM User Manual

Texas Instruments DAC5686 EVM User Manual

Hide thumbs Also See for DAC5686 EVM:

Advertisement

Quick Links

DAC5686 EVM
User's Guide
March 2007
Wireless Infrastructure Products
SLWU006E

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the DAC5686 EVM and is the answer not in the manual?

Questions and answers

Summary of Contents for Texas Instruments DAC5686 EVM

  • Page 1 DAC5686 EVM User's Guide March 2007 Wireless Infrastructure Products SLWU006E...
  • Page 2 SLWU006E – December 2004 – Revised March 2007 Submit Documentation Feedback...
  • Page 3: Table Of Contents

    Power Requirements ..................... Software Installation ..................Hardware Configuration ................DAC5686 EVM Operational Procedure ................ Starting the Serial Interface Program ................DAC5686 EVM Initial Setup Tests ................ DAC5686 GUI Register Descriptions ....................Physical Description ...................... PCB Layout ......................Parts List .....................
  • Page 4 List of Figures ......................Serial Interface GUI ....... DAC5686 Setup for X4 Interpolation, Single Sideband Mode and Tone at Fdac/4 ......Spectrum with CLK2 = 500 MHz, X4 Interpolation, Single Sideband Mode, NCO Off Spectrum with CLK2 = 320 MHz, X4 Interpolation, Single Sideband Mode and NCO Frequency = ........................
  • Page 5: Overview

    DAC. The DAC5686 EVM allows the user to program the DAC5686 internal registers with the supplied computer parallel port cable and serial interface software. The interface allows read and write access to all registers that define the operation mode of the DAC5686 device.
  • Page 6: Software Installation

    Hardware Configuration The DAC5686 EVM can be set up in a variety of configurations to accommodate a specific mode of operation. Before starting evaluation, the user should decide on the configuration and make the appropriate connections or changes. The demonstration board comes with the following factory-set configuration: •...
  • Page 7: Dac5686 Evm Operational Procedure

    DAC5686 EVM Operational Procedure This chapter describes the serial interface GUI. To prepare the DAC5686 EVM for operation, follow these steps: 1. Parallel Port Interface: Connect one end of the supplied serial interface cable to the parallel port of a PC and the other end of the cable to J1 on the EVM and skip steps 2 to 7.
  • Page 8 (advanced)”. Click “Next”. 5. Select "Search for the best driver in these locations" and browse for the folder where the DAC5686 program was installed (the default location is C:\Program Files\Texas Instruments\DAC5686). Once the file path has been selected, click “Next” to proceed.
  • Page 9 DAC5686 EVM Operational Procedure 6. If Windows XP is configured to warn when unsigned (non-WHQL certified) drivers are about to be installed, the following screen is displayed unless installing a Microsoft WHQL certified driver. Click on "Continue Anyway" to continue with the installation. If Windows XP is configured to ignore file signature warnings, no message will appear.
  • Page 10: Starting The Serial Interface Program

    DAC5686 EVM Operational Procedure Starting the Serial Interface Program Power up the EVM. After power up, depress switch S1 to reset the DAC5686. Start the software by running DAC5686_SPI.exe. If the EVM is powered on with the parallel port connected properly, then the...
  • Page 11: Dac5686 Evm Initial Setup Tests

    DAC5686 EVM Operational Procedure DAC5686 EVM Initial Setup Tests There are several initial tests with the DAC5686 that can be done without any input data. The following setup steps are suggested to familiarize the user with the DAC5686 and EVM software and verify that the DAC5686 is functioning properly.
  • Page 12: Spectrum With Clk2 = 500 Mhz, X4 Interpolation, Single Sideband Mode, Nco Off

    DAC5686 EVM Operational Procedure A tone at a frequency of CLK2/4 should now be present at connectors J5 (IOUTA) and J19 (IOUTB). In the case of CLK2 = 500 MHz, the output spectrum should be similar to Figure 3, with a tone at 125 MHz.
  • Page 13: Dac5686 Gui Register Descriptions

    DAC5686 EVM Operational Procedure 5. Reduce the CLK2 frequency to less than 320MHz. Enable the NCO and change the NCO DDS to 536870912. Doing this will generate a tone at Fdac/8. For CLK2 = 320 MHz, the tone corresponds to 40 MHz.
  • Page 14 • Sif: Sets sif_4pin bit. The 4 pin serial interface mode is enabled when on, 3 pin mode when off. The DAC5686 EVM is configured for a 3 pin serial interface, so setting to a 4 bit serial interface makes reading registers impossible with the GUI.
  • Page 15: Physical Description

    DAC5686 input pin. For a 2-3 inch trace, a 22-Ω to 47-Ω resistor are recommended. SLWU006E – December 2004 – Revised March 2007 DAC5686 EVM Submit Documentation Feedback...
  • Page 16: Top Layer

    Physical Description Figure 5. Top Layer 1 DAC5686 EVM SLWU006E – December 2004 – Revised March 2007 Submit Documentation Feedback...
  • Page 17: Layer 2, Ground Plane

    Physical Description Figure 6. Layer 2, Ground Plane SLWU006E – December 2004 – Revised March 2007 DAC5686 EVM Submit Documentation Feedback...
  • Page 18: Layer 3, Power Plane

    Physical Description Figure 7. Layer 3, Power Plane DAC5686 EVM SLWU006E – December 2004 – Revised March 2007 Submit Documentation Feedback...
  • Page 19: Parts List

    Physical Description Figure 8. Bottom Layer Parts List Table 1 lists the parts used in constructing the EVM. SLWU006E – December 2004 – Revised March 2007 DAC5686 EVM Submit Documentation Feedback...
  • Page 20 Physical Description Table 1. DAC5686 EVM Parts List Bill Of Material For DAC5686 Value Part Number Vendor Ref Des Not Installed CAPACITORS 47 µF, tantalum, 20%, 10 V ECS-T1AD476R Panasonic C53–C58 10 µF, 10 V, 20% capacitor ECS-T1AX106R Panasonic C24, C26–C28, C30–C32,...
  • Page 21: Circuit Description

    DAC5686 converter, the clock source should feature low jitter. Using a clock with a 50% duty cycle gives optimum dynamic performance. Input Data The DAC5686 EVM can accept 1.8-V or 3.3-V CMOS logic level data inputs through the 34-pin headers J13 and J14 per Table 2 Table 3.
  • Page 22: Output Data

    CMOS data bit 15 (MSB) CMOS data bit 7 CMOS data bit 8 Output Data The DAC5686 EVM can be configured to drive a doubly terminated 50-W cable or provide unbuffered differential outputs. 4.3.1 Transformer-Coupled Signal Output The factory-set configuration of the demonstration board provides the user with single-ended output signals at SMA connectors J5 and J19.
  • Page 23: Control Inputs

    The DAC5686 device has six discrete inputs to control the operation of the device. 4.4.1 Sleep Mode The DAC5686 EVM provides a means of placing the DAC5686 device into a power-down mode. This mode is activated by placing a jumper between pins 5 and 6 on header J15. 4.4.2 Reset The DAC5686 EVM provides a means of resetting the DAC5686 device.
  • Page 24: Internal Reference Operation

    TP1 (EXTI/O) and connecting EXTLO to +3.3VA with jumper W1 installed between pins 1 and 2. The specified range for external reference voltages must be observed (see the DAC5686 data sheet (SLWS147) for details). DAC5686 EVM SLWU006E – December 2004 – Revised March 2007 Submit Documentation Feedback...
  • Page 25: Schematic

    Schematic Schematic This chapter contains the DAC5686 EVM schematic diagrams. SLWU006E – December 2004 – Revised March 2007 DAC5686 EVM Submit Documentation Feedback...
  • Page 26 Schematic Figure 9. Schematic - Page 1 DAC5686 EVM SLWU006E – December 2004 – Revised March 2007 Submit Documentation Feedback...
  • Page 27 Schematic Figure 10. Schematic - Page 2 SLWU006E – December 2004 – Revised March 2007 DAC5686 EVM Submit Documentation Feedback...
  • Page 28 Schematic Figure 11. Schematic - Page 3 DAC5686 EVM SLWU006E – December 2004 – Revised March 2007 Submit Documentation Feedback...
  • Page 29 Schematic Figure 12. Schematic - Page 4 SLWU006E – December 2004 – Revised March 2007 DAC5686 EVM Submit Documentation Feedback...
  • Page 30 Schematic Figure 13. Schematic - Page 5 DAC5686 EVM SLWU006E – December 2004 – Revised March 2007 Submit Documentation Feedback...
  • Page 31 EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
  • Page 32: Important Notices

    TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products...

Table of Contents