ADM-VPX3-9Z2 User Manual
V1.1 - 16th January 2020
Appendix C.3: MGT Pins
Signal
DP0_M2C_N
DP0_M2C_P
DP1_M2C_N
DP1_M2C_P
DP2_M2C_N
DP2_M2C_P
DP3_M2C_N
DP3_M2C_P
DP4_M2C_N
DP4_M2C_P
DP5_M2C_N
DP5_M2C_P
DP6_M2C_N
DP6_M2C_P
DP7_M2C_N
DP7_M2C_P
DP8_M2C_N
DP8_M2C_P
DP9_M2C_N
DP9_M2C_P
DP10_M2C_N
DP10_M2C_P
DP11_M2C_N
DP11_M2C_P
DP12_M2C_N
DP12_M2C_P
DP13_M2C_N
DP13_M2C_P
DP14_M2C_N
DP14_M2C_P
DP15_M2C_N
DP15_M2C_P
DP16_M2C_N
DP16_M2C_P
FMC Pin Assignments
ad-ug-1323_v1_1.pdf
FMC (J1)
FPGA
C7
T1
C6
T2
A3
P1
A2
P2
A7
M1
A6
M2
A11
L3
A10
L4
A15
K1
A14
K2
A19
J3
A18
J4
B17
H1
B16
H2
B13
F1
B12
F2
B9
D1
B8
D2
B5
C3
B4
C4
Y11
B1
Y10
B2
Z13
A3
Z12
A4
Y15
T34
Y14
T33
Z17
P34
Z16
P33
Y19
N32
Y18
N31
Y23
M34
Y22
M33
Z33
L32
Y35
K34
Table 34 : MGT Pins (continued on next page)
|
FPGA
|
R3
|
R4
|
P5
|
P6
|
N3
|
N4
|
M5
|
M6
|
K5
|
K6
|
H5
|
H6
|
G3
|
G4
|
F5
|
F6
|
E3
|
E4
|
D5
|
D6
|
B5
|
B6
|
A7
|
A8
|
T30
|
T29
|
R32
|
R31
|
P30
|
P29
|
M30
|
M29
|
K30
|
J32
FMC (J1)
Signal
C3
DP0_C2M_N
C2
DP0_C2M_P
A23
DP1_C2M_N
A22
DP1_C2M_P
A27
DP2_C2M_N
A26
DP2_C2M_P
A31
DP3_C2M_N
A30
DP3_C2M_P
A35
DP4_C2M_N
A34
DP4_C2M_P
A39
DP5_C2M_N
A38
DP5_C2M_P
B37
DP6_C2M_N
B36
DP6_C2M_P
B33
DP7_C2M_N
B32
DP7_C2M_P
B29
DP8_C2M_N
B28
DP8_C2M_P
B25
DP9_C2M_N
B24
DP9_C2M_P
Z25
DP10_C2M_N
Z24
DP10_C2M_P
Y27
DP11_C2M_N
Y26
DP11_C2M_P
Z29
DP12_C2M_N
Z28
DP12_C2M_P
Y31
DP13_C2M_N
Y30
DP13_C2M_P
M19
DP14_C2M_N
M18
DP14_C2M_P
M23
DP15_C2M_N
M22
DP15_C2M_P
M27
DP16_C2M_N
M31
DP16_C2M_P
Page 27
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