Switch Definitions; Table 3 Reset Switch Definitions; Table 4 Vpx Control Switch Definitions (Sw3); Table 5 Processor Setup Switch Definitions (Sw4) - Alpha Data ADM-VPX3-9Z2 User Manual

3.1.1 Switch Definitions

There are two push-button reset switches on the board. Their functions are detailed below.
Switch Ref.
SW1
SW2
There are two sets of eight DIP switches placed on the bottom of the board. Their functions are described below.
Note:
All switches are OFF by default. Factory Configuration switch must be in the OFF position for normal
operation.
Switch Ref.
SW3-1
SW3-2
SW3-3
SW3-4
SW3-5
SW3-6
SW3-7
SW3-8
Switch Ref.
SW4-(4:1)
SW4-5
SW4-6
SW4-7
SW4-8
Page 6
Function ON State
Hardware
Hardware Reset (complete restart)
Reset
Software Reset Software Reset (warm reset)
Table 3 : Reset Switch Definitions
Function ON State
Spare (to FPGA
User defined
pin AM14)
Internal
Use VPX REFCLK
Oscillator
Internal SATA Internal SSD is connected to PS
SSD Enable HSSIO lane 1
Flash Boot Target FPGA is not configured from
Inhibit onboard flash memory.
VPX JTAG Connect JTAG chain to P0
HSSIO_MUX_­ FPGA MGT Bank 129 routed to FMC+
SELECT A Socket
Factory
-
Configuration
HSSIO_MUX_­ FPGA MGT Bank 130 routed to FMC+
SELECT B Socket
Table 4 : VPX Control Switch Definitions (SW3)
Function ON State
PS_MODE(3:0) PS Boot Mode - see section
PS HSSIO lane 0 connected to PCIe
PS_MUX_SEL0
(0)
PS HSSIO lanes (2:1) connected to
PS_MUX_SEL1
PCIe(2:1)
nSD_EMMC SD Card enabled
SD Card Write Protected (must be
SD_WP
enabled in software)
Table 5 : Processor Setup Switch Definitions (SW4)
ADM-VPX3-9Z2 User Manual
Off State
Normal Operation
Normal Operation
Off State
User defined
Use Internal Oscillator source
PCIe lane (1) is connected to PS
HSSIO lane 1
Target FPGA is configured from on-
board flash memory.
Isolate JTAG chain from P0
FPGA MGT Bank 129 connected to
V66.4 Fibre
Normal Operation
FPGA MGT Bank 130 connected to
VPX P1
Off State
Boot Modes
PS HSSIO lane 0 connected to VPX
P1
PS HSSIO lanes (2:1) connected to
VPX P1
eMMC device enabled
SD Card Write Enabled
V1.1 - 16th January 2020
Functional Description
ad-ug-1323_v1_1.pdf