Expansion/User Plane (P1 Wafers 9-14); Control Plane (P1 Wafers 15-16); Table 29 Expansion/User Plane (P1 Wafers 9-14); Table 30 Control Plane (P1 Wafers 15-16) - Alpha Data ADM-VPX3-9Z2 User Manual

Appendix A.3: Expansion/User Plane (P1 Wafers 9-14)
Signal
P1_TX1_P
P1_TX1_N
P1_TX2_P
P1_TX2_N
P1_TX3_P
P1_TX3_N
P1_MUX_TX_P_2
P1_MUX_TX_N_2
P1_MUX_TX_P_3
P1_MUX_TX_N_3
Appendix A.4: Control Plane (P1 Wafers 15-16)
Signal
ETH2_TX_P
ETH2_TX_N
ETH1_TX_P
ETH1_TX_N
Page 22
VPX P1 FPGA
E10 AB29
F10 AB30
D11 W31
E11 W32
E12 V29
F12 V30
D13 B29
E13 B30
E14 A31
F14 A32
Table 29 : Expansion/User Plane (P1 Wafers 9-14)
VPX P1 Component.Pin
D15 U35.4
E15 U35.5
E16 U32.4
F16 U32.5
Table 30 : Control Plane (P1 Wafers 15-16)
| FPGA
| AB33
| AB34
| Y33
| Y34
| V33
| V34
| C31
| C32
| B33
| B34
| Component.Pin
| U35.1
| U35.2
| U32.1
| U32.2
ADM-VPX3-9Z2 User Manual
V1.1 - 16th January 2020
VPX P1 Signal
B10 P1_RX1_P
C10 P1_RX1_N
A11 P1_RX2_P
B11 P1_RX2_N
B12 P1_RX3_P
C12 P1_RX3_N
A13 P1_MUX_RX_P_2
B13 P1_MUX_RX_N_2
B14 P1_MUX_RX_P_3
C14 P1_MUX_RX_N_3
VPX P1 Signal
A15 ETH2_RX_P
B15 ETH2_RX_N
B16 ETH1_RX_P
C16 ETH1_RX_N
P1 Pin Assignments
ad-ug-1323_v1_1.pdf