Appendix A P1 Pin Assignments; Data Plane (P1 Wafers 1-4); Data/Expansion Plane (P1 Wafers 5-8); Table 27 Data Plane (P1 Wafers 1-4) - Alpha Data ADM-VPX3-9Z2 User Manual

ADM-VPX3-9Z2 User Manual
V1.1 - 16th January 2020
Appendix A: P1 Pin Assignments
Appendix A.1: Data Plane (P1 Wafers 1-4)
Signal
PCIE_TX0_P
PCIE_TX0_N
PCIE_TX1_P
PCIE_TX1_N
PCIE_TX2_P
PCIE_TX2_N
PCIE_TX3_P
PCIE_TX3_N
Appendix A.2: Data/Expansion Plane (P1 Wafers 5-8)
Signal
P1_MUX_TX_P_0
P1_MUX_TX_N_0
P1_MUX_TX_P_1
P1_MUX_TX_N_1
P1 Pin Assignments
ad-ug-1323_v1_1.pdf
VPX P1 FPGA
D1 AB29
E1 AB30
E2 Y29
F2 Y30
D3 W31
E3 W32
E4 V29
F4 V30
Table 27 : Data Plane (P1 Wafers 1-4)
VPX P1 FPGA
E6 F29
F6 F30
D7 D29
E7 D30
Table 28 : Data/Expansion Plane (P1 Wafers 5-8)
| FPGA VPX P1
| AB33 A1
| AB34 B1
| AA31 B2
| AA32 C2
| Y33 A3
| Y34 B3
| V33 B4
| V34 C4
| FPGA
| B6
| C6
| A7
| B7
Signal
PCIE_RX0_P
PCIE_RX0_N
PCIE_RX1_P
PCIE_RX1_N
PCIE_RX2_P
PCIE_RX2_N
PCIE_RX3_P
PCIE_RX3_N
VPX P1 Signal
A13 P1_MUX_RX_P_0
B13 P1_MUX_RX_N_0
B14 P1_MUX_RX_P_1
C14 P1_MUX_RX_N_1
Page 21