About Ultrasparc Iii Cpu Modules - Sun Microsystems Sun Blade 1000 Module Installation Manual

About UltraSPARC III CPU Modules

The UltraSPARC III CPU module is a high-performance, highly-integrated
superscalar processor implementing SPARC-V9 64-bit reduced instruction set
computer (RISC) architecture. The CPU module has been updated and improved to
further advance reliability, availability, scalability, and serviceability features of the
UltraSPARC III Cu CPU module.
Note – There are now two types of UltraSPARC III CPU modules: the UltraSPARC
III 600, 750, or 900 MHz CPU modules and the UltraSPARC III Cu CPU modules.
Note – UltraSPARC III Cu CPU modules are marked "USIII Cu" (see
The workstation's motherboard provides slots for two UltraSPARC III CPU modules.
Each processor module includes one CPU chip with an integrated memory cache for
data and instructions, as well as up to 8 Mbytes of external static random access
memory (SRAM) cache memory.
The CPU modules communicate with the workstation's main memory and I/O
subsystem via the workstation's high-speed data bus. The workstation CPU modules
are automatically synchronized with the system bus that runs at clock speeds up to
150 MHz.
Configuration Rules
The following configuration rules apply to both UltraSPARC III and UltraSPARC III
Cu CPU modules used in the Sun Blade 1000 and Sun Blade 2000 workstations:
You can install one or two UltraSPARC III CPU modules into the workstation
motherboard.
Always insert the first CPU module into CPU (processor) slot 0 (connectors J0501
and J0601).
If a second CPU module is to be installed, install the second CPU module into
CPU (processor) slot 1 (connectors J0701 and J0801).
If you wish to install more than one UltraSPARC III 600, 750, or 900 MHz CPU
module, you can. The speed of the modules does not need to be identical.
If you wish to install more than one UltraSPARC III Cu CPU module you can.
However, the speed of the modules must be identical.
Sun Blade 1000 and Sun Blade 2000 UltraSPARC III Cu CPU Module Installation Guide
).
FIGURE 1
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