Power Blo Ock - Wiznet W5300E01-ARM User Manual

Table of Contents

Advertisement

W5300E01-ARM B/D PIN NAME
PIN#
1
GND / VSS
2
5V / VDD
3
V0 / V0
4
A1 / RS
5
A2 / RW
6
LCD_E / E
7 ~ 14
D0 / DB0 ~ D7 / DB7
15
5V / LED A
16
GND / LED K
74LBC4245 Bidirectional Level shifter is installed between I/O interface voltage level, 3.3V and LCD
operational voltage level, 5V, for stable operation.More reliable opration is available by checking LCD Busy
Flag through bi-directional buffer.
Low active chip select signal of S3C2410A is passed through inverter and changed to High active.And it is
used for LCD Enable singal
For more detail related to LCD operation, refer to LCD datasheet. (LC1624(R2).pdf).
3.2.10.
Power Block
The power of W5300E01-ARM is supplied by 5V/2A adaptor. The internal power is 5V, 3.3V and 1.8V. For
the detail of each power, refer to reference schematic or '3.1.2 Power Block Diagram'.
The input of 5V adaptor can be controlled by power switch (SW1). In order to prevent the damage by over-
power when the switch is on, Poly-Fuse(F1) is applied.
Low Drop Out Regulator (5V -> 3.3V, 3.3V -> 1.8V) is applied for power efficiency and heat minimization.
/ LCD PIN NAME
Table 3-1 : LCD PIN Description
© Copyright 2008 WIZnet Co., Inc. All rights reserved.
DIR.
Description
Signal Ground
I
LCD Power Supply
I
Voltage for LCD drive
I
Data / Instruction register select
I
Read / Write
I
Enable signal,start data read / write
I/O
Data Bus Line
O
LED Anode, power supply+
O
LED Cathode,ground 0V
11

Advertisement

Table of Contents
loading

Table of Contents