Sony MFS-2000-C Installation Manual page 29

<LED>
D204, D208, D304 (A-3) : + + + + + 1.5 V-1 to 3
+1.5 V-1 to 3 power supply status indication.
Lit when the +1.5 V-1 to 3 power is supplied each.
D308 (A-3) : + + + + + 2.5 V
+2.5 V power supply status indication.
Lit when the +2.5 V power is supplied.
D409 (A-2) : + + + + + 3.3 V
+3.3 V power supply status indication.
Lit when the +3.3 V power is supplied.
D410 (A-2) : + + + + + 12 V
+12 V power supply status indication.
Lit when the +12 V power is supplied.
If this LED does not light, the fuse may have blown.
D3701 (A-6): CONFIG. ERROR status LED
Indicates the configuration error of the FPGA.
If this LED lit, the FPGA can possibly be working incor-
rectly.
D3702, D3704, D3705 (A-6): C2, C1 and C0 status
LED
Indicates the status of CPU on the circuit board.
D3703 (A-6): PLL UNLOCK status LED
Indicates lock/unlock of the PLL (Phase Locked Loop) in
the FPGA.
If this LED lit, the PLL can possibly be unlocked.
MFS-2000 IM
<Switch>
S401 (A-5) : MIX-CPU reset switch
Pressing this switch initializes the CPU on the MIX-48 board.
S2702 (A-5) : Monitor reset switch
Used for maintenance purpose.
This is a reset switch used in maintaining through the
terminal pin (CN2001).
<Slit land>
SL1, SL2 (A-4), SL3 (A-5) : JTAG chain switching
They are the slit lands that are used to switch the JTAG
chains. Connect these slit lands to open or to close them so
that the following statuses can be obtained.
SL1 SL2 SL3 Status
Short Open Open The chain of CPLD only is established.
Open Short Short All of the JTAG devices are connected
in chain.
<LED on the CPU-DR module>
Refer to <LED on the CPU-DR module> in "1. CA-54
board".
<Switch on the CPU-DR module>
Refer to <Switch on the CPU-DR module> in "1. CA-54
board".
<LED on the CPU-DT module>
Refer to <LED on the CPU-DT module> in "1. CA-54
board".
<Switch on the CPU-DT module>
Refer to <Switch on the CPU-DT module> in "1. CA-54
board".
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