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4.3.7
Second LO and BFO Generator AS
The second local oscillator and beat frequency oscillator circuit card assembly contains the
circuitry for these two oscillators. An internal/external frequency reference circuit is also contained on
this circuit card. The second local oscillator develops the fIxed 40 MHz signals for the second mixer that
in turn provides the 455 kHz second IF signal. The BFO is a variable oscillator that provides both the
455 kHz second IF signal and the basic 455 kHz beat frequency for sideband and CW modes of opera-
tion. The oscillator, through receiver control, may be either set at 455 kHz or varie.d plus or minus 8
kHz either side of its basic frequency for CW operation. The internal/ external frequency 'reference
.
circuit provides a reference frequency for both oscillators phase lock loops as well as the fIrst La. con-
tained on A7. In addition,the circuit includes an internal temperature controlled crystal oscillator
which supplies a selectable 1 MHz,S MHz or 10 MHz reference frequency output at. the rear panel. An
external reference frequency can be used in place of the internal reference. The circuit description for
the internal/external reference, the second LO and BFO are described under their respective headings
with functional block diagrams shown in Figures 4-13 and 4-15. Schematic diagrams of these circuits
are shown in Figure 7-10.
4.3.7.1
Internal/External Reference Frequency
The AS circuit card contains circuitry that permits either an internal or external reference
frequency. This reference frequency is required for the operation of all three oscillator synthesizers.
A reference in/out connector and switch on the rear panel in addition to linkage on the A8 circuit
card provide for the selection of either internal or external frequency and for selecting the proper
divide by N frequency for the Phase Comparator.
4.3.7.2
Internal Mode
.•. A5MHz cryst~oscillator Y1, located on AS is used as the internal reference frequency.
With the rear panel REF INT /EXT switch in the INT position, the base of Q 1 is grounded through
R7 which turns voltage regulator U1 on. The voltage from this regulator enables the temperature con-
trolled crystal oscillator. Approximately 30 minutes are required for maximum stability. The oscilla-
tor output is coupled through capacitor C5 to the base of transistor switch Q5. With the ground ap-
plied through the INT/EXT switch, the base of Q5 is held high through inverter U2A and diode CR3
while the base of transistor switch Q4 is held low through diode CR2. Transistor Q5 conducts, trans-
ferring the 5 MHz signal through a TIL square wave shaper Q6 to one clock input of the phase
cOinparator. See 4.3.7.4, item 3. The 20 MHz voltage controlled oscillator, described in 4.3.7.4, item 2,
is stabilized through the use' of this reference frequency. The 20 MHz output of the oscillator is
divided by three dividers (two +2, U7B ... U7A and a +10, U6). The two dividers (-;..2) are contained
in a single dual D flip-flop. The cIock signal (20 MHz) is applied to the clock input of U7 A. With the
Q output connected to the D input, the Q output provides the 10 MHz reference. The 10 MHz is also
connected to the cIock input of the second flip-flop and to the divide by 10 circuit. The second
flip-flops Q output provides the
5
MHz reference signal. The divide by 10 circuit is a two stage
divider (-;.. 2 and -;.. 5). The 10 MHz drives the cIock input for the divide by 5 at B input pin 1. The
output of this divider (QD pin 11) is connected back to the clock of the second divider (-;.. 2) at A
input pin 14. Dividing by 5 fIrst then by 2 provides a more symmetrical 1 MHz reference. The 1
MHz signal is output from the divider (-;.. 2) at QA output pin 12. The 1 MHz,S MHz and 10 MHz
freq uencies derived from these dividers are available for reference through data select switches U4
and U5. The I MHz reference is routed directly to the BFO synthesizer and to the fIrst local oscilla-
tor synthesizer through NAND gate UIIC and connector 12. One of the three frequencies will be
selected by data select U5 and routed to rear panel connector 17. Either one of the three fre-
quencies may be selected by proper connection of links LKI and LK2. In this internal mode, data
select C of both U4 and U5 is held low through the INT/EXT switch. Linking LK1 makes data
4-33
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