Agilent Technologies 93000 SOC Series Training Manual page 368

Lesson 1 – Analog Clock Domain Description
Also the clock frequency is set in Clock Domain Setup page. This
is described in the next lesson.
The selected clock is supplied to all analog modules you set to be
connected to the analog clock domain. This is independent of the
card cages in which the modules are installed.
Analog modules in the digital clock domain, independent of the
card cage they are in, receive their clock from the clock source of
the digital domain.
Characteristics of Analog Clock Sources and Clock
Distribution to Analog Modules in Card Cage Slots
INT - The Internal Clock Board of the Analog Card Cage
When you select this analog clock source, the clock board of each
analog card cage generates the analog domain clock signal for the
analog modules in its cage. You define the clock signal frequency
for the analog clock domain in the Clock Domain Setup page.
All clock boards are identical. The clock generation is done by a 64
bit PLL on the clock boards. This provides a clock resolution of 15
decimal digits. The clock frequency range is 200 - 500 MHz.
In addition to the generated clock signal, the clock boards can also
forward the digital domain clock signal to all analog boards at the
same time. This is summarized in the figure on page 369.
AMC - The Alternate Master Clock
Mixed-signal tests may require a clock source with lower noise and
a higher precision than provided by the internal clock board PLL.
The Alternate Master Clock option (AMC) provides a very stable
clock signal with extremely low noise and jitter. This signal can be
directly connected to all analog card cages. The AMC signal is fed
into the clock board of the card cage. The clock board distributes
the signal to all slots of the card cage. This is shown in the figure
below.
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