Agilent Technologies 93000 SOC Series Training Manual page 207

Mixed-signal training
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Lesson 3 – Setting up the Digitizers in the Digital Clock Domain
Calculation of Fs and N
These are the valid N values for all analog modules which divide
the master clock to generate the sampling frequency Fs.
Analog Module
WDB
WDE
WDA
WDD
SPA
SPB
WGA
WGE
WGB
WGD
WGF
*
The Nmin value applies for the minimum master clock frequency of 200MHz and the
Nmax value for the maximum frequency of 500 MHz. The equation Fs = MCLK/N must
always result in an Fs value in the module's Fs range.
Valid Clock Divisors of Analog Modules
Nmin - Nmax *
98 – 62500
40 - 4000
5 - 500
1 – 500 (4 – 500 for sampler mode)
200 - 62500
20 - 5000
196 - 62500
7 - 62500
2 - 62500
1 - 61440
N must be set to -16, -8, -4, -2, 1, 2, 4 or 8.
(-16, -8, -4 and -2 mean 1/16, 1/8, 1/4 and 1/2)
207

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