Sram - Motorola MVME172P4 Series Installation And Use Manual

Functional Description
MVME172LX functionality, firmware will enable either the parity or the
ECC memory controller model, depending on board configuration. (The
board configuration is a function of switch settings and resistor population
options.)
User code can modify Petra register settings to operate in either mode.
User code can also modify map decoder/switch settings to enable the
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maximum amount of memory available. The minimum SDRAM
configuration is 16MB.
For specifics on SDRAM performance and for detailed programming
information, refer to the chapters on MC2 and MCECC memory controller
emulations in the MVME1X2P4 VME Embedded Controller
Programmer's Reference Guide.

SRAM

The MVME172P4 implementation includes a 512KB SRAM (static
RAM) option. SRAM architecture is single non-interleaved. SRAM
performance is described in the section on the SRAM memory interface in
the chapter on the MC2 memory controller emulation in the MVME1X2P4
VME Embedded Controller Programmer's Reference Guide. An onboard
battery supplies VCC to the SRAM when main power is removed. The
worst-case elapsed time for battery protection is 200 days. The SRAM
arrays are not parity protected.
The battery backup function for the onboard SRAM is provided by a coin-
type Panasonic CR2032 device (or equivalent) that supports primary and
secondary power sources. In the event of a main board power failure, the
CR2032 checks power sources and switches to the source with the higher
voltage.
If the voltage of the backup source is lower than two volts, the CR2032
blocks the second memory cycle; this allows software to provide an early
warning to avoid data loss. Because the second access may be blocked
during a power failure, software should do at least two accesses before
relying on the data.
The MVME172P4 provides jumpers (on J22) that allow either power
source of the backup battery to be connected to the VMEbus +5V STDBY
pin or to one cell of the onboard battery. For example, the primary system
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