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The Z85230 supplies an interrupt vector during interrupt acknowledge
cycles. The vector is modified based upon the interrupt source within the
Z85230. Interrupt request levels are programmed via the Petra MC2
function (the MC2 emulation can handle up to four Z85230 chips). Refer
to the Z85230 data sheet listed listed under Manufacturer's Documents in
the Related Documentation appendix, and to the MC2 programming model
in the MVME1X2P4 VME Embedded Controller Programmer's Reference
Guide, for information.
MVME172P4 Serial Port 1
Port A on the Z85230 is interfaced as DCE (data circuit-terminating
equipment) with the EIA-232-D interface and is routed to:
1. The DB25 connector marked
panel of the MVME172P4.
232-D DCE port.
Note
This port can be connected to the TX and RX clocks which may
be present on the DB25 connector. These connections are made
via jumper header J16 on the MVME172P4 board. (The TXC and
RXC clock lines are not available on the MVME712x transition
modules.)
2. The DB25 connector marked
the MVME712M transition module (if used).
configured as an EIA-232-D DTE or DCE port, via jumper headers
J16 and J17.
Figure 1-3
available for Port A when the MVME172P4 is used with an MVME712M.
MVME172P4 Serial Port 2
The configuration of port B on the Z85230 is determined via a Serial
Interface Module (SIM) which is installed at connector J15 on the
MVME172P4 board. Five SIMs are available:
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SERIAL PORT 1/CONSOLE
SERIAL PORT 1/CONSOLE
SERIAL PORT 2
(sheets 1 and 2) in Chapter 1 illustrates the two configurations
Functional Description
on the front
is an EIA-
on the front panel of
can be
SERIAL PORT 2
4-13
4
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