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conductive chassis rails (EMC compliance)
A-4
configurable items, MVME172P4 board
configuration switches
S3 (Flash Write Enable mode)
S3 (MC2 DRAM size) 1-15,
S4 (as general-purpose readable switch)
1-17
S4 (as software-readable switch)
S4 (EPROM/Flash selection) 2-9,
S5 (Flash write enable) 1-20,
S5 (IP DMA snoop control) 1-18,
S5 (IP reset mode) 1-19,
S6 (MCECC DRAM size) 1-21,
configuration switches, location of
Configure Board Information Block (CNFG)
firmware command
configuring
172Bug parameters
hardware
2-5
IndustryPack modules
IP base addresses
VMEbus interface
connection diagrams
EIA-232-D
1-29
EIA-530
1-35
connector pin assignments
connectors
4-19
IndustryPack (IP)
console port
2-7
control/status registers
controller LUN (CLUN) C-1,
controller modules
disk/tape
D-1
network
C-1
I
cooling requirements
N
CSR bit IP32 (IP bus clock)
D
D
E
data bus structure, MVME172P4
X
data circuit-terminating equipment (DCE)
4-13
IN-2
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data sheets
date and time, setting 2-8,
1-5
DCE (data circuit-terminating equipment)
2-7
debugger
2-7
2-5
default baud rate
3-3
device LUN (DLUN) C-1,
4-11
diagnostic facilities
2-7
dimensions, base board
2-7
direct access devices
2-7
direct memory access (DMA)
1-5
directories, switching
disk/tape controller modules supported
3-9
DLUN (device LUN) C-1,
DMA (direct memory access)
3-11
DRAM (dynamic RAM)
3-20
3-20
E
3-16
EIA-232-D
5-1
EIA-485/EIA-422
1-23
EIA-530
1-27
EIA-530/V.36 SIM part numbers
D-1
EMC regulatory compliance
ENV command parameters
environmental parameters
EPROM
A-2
1-8
4-6
EPROM/Flash selection (S4)
ESD (electrostatic discharge), precautions
E-2
B-2
4-13
commands
3-6
firmware (172Bug)
3-8
prompt
3-5
2-8
D-2
2-14
A-1
D-4
4-15
2-14
D-2
4-15
base address
1-26
options
4-7
connection diagrams
1-29
ports
2-7
SIM part numbers
1-10
connection diagrams
1-37
connection diagrams
1-35
A-4
3-11
3-9
3-3
and Flash memory
4-11
size select header (J23)
1-14
socket
4-11
1-17
against
1-3
Computer Group Literature Center Web Site
Index
D-1
1-10
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