Espressif ESP8266 Technical Reference page 96

GPIO Base Address
0x60000300
GPIO RegAddr = PERIPHS_GPIO_BASEADDR+ (OFFSET*4)
NU
OFFSET RegAddr RegName Signal
M
0 0x0000 0x60000300 GPIO_OUT GPIO_BT_SEL
GPIO_OUT_DATA
1 0x0001 0x60000304 GPIO_OUT_W1TS
GPIO_OUT_DATA_W1TS
2 0x0002 0x60000308 GPIO_OUT_W1TC
GPIO_OUT_DATA_W1TC
3 0x0003 0x6000030C GPIO_ENABLE
GPIO_SDIO_SEL
GPIO_ENABLE_DATA
4 0x0004 0x60000310 GPIO_ENABLE_W1TS
GPIO_ENABLE_DATA_W1TS
5 0x0005 0x60000314 GPIO_ENABLE_W1TC
GPIO_ENABLE_DATA_W1TC
6 0x0006 0x60000318 GPIO_IN GPIO_STRAPPING
GPIO_IN_DATA
7 0x0007 0x6000031C GPIO_STATUS
GPIO_STATUS_INTERRUPT
8 0x0008 0x60000320 GPIO_STATUS_W1TS
GPIO_STATUS_INTERRUPT_W1TS
9 0x0009 0x60000324 GPIO_STATUS_W1TC
GPIO_STATUS_INTERRUPT_W1TC
10 0x000a 0x60000328 GPIO_PIN0
GPIO_PIN0_WAKEUP_ENABLE
GPIO_PIN0_INT_TYPE
GPIO_PIN0_DRIVER
GPIO_PIN0_SOURCE
11 0x000b 0x6000032C GPIO_PIN1
GPIO_PIN1_WAKEUP_ENABLE
GPIO_PIN1_INT_TYPE
GPIO_PIN1_DRIVER
GPIO_PIN1_SOURCE
12 0x000c 0x60000330 GPIO_PIN2
GPIO_PIN2_WAKEUP_ENABLE
GPIO_PIN2_INT_TYPE
GPIO_PIN2_DRIVER
GPIO_PIN2_SOURCE
13 0x000d 0x60000334 GPIO_PIN3
GPIO_PIN3_WAKEUP_ENABLE
GPIO_PIN3_INT_TYPE
GPIO_PIN3_DRIVER
GPIO_PIN3_SOURCE
14 0x000e 0x60000338 GPIO_PIN4
GPIO_PIN4_WAKEUP_ENABLE
GPIO_PIN4_INT_TYPE
GPIO_PIN4_DRIVER
GPIO_PIN4_SOURCE
15 0x000f 0x6000033C GPIO_PIN5
GPIO_PIN5_WAKEUP_ENABLE
GPIO_PIN5_INT_TYPE
GPIO_PIN5_DRIVER
GPIO_PIN5_SOURCE
16 0x0010 0x60000340 GPIO_PIN6
GPIO_PIN6_WAKEUP_ENABLE
GPIO_PIN6_INT_TYPE
GPIO_PIN6_DRIVER
GPIO_PIN6_SOURCE
17 0x0011 0x60000344 GPIO_PIN7
GPIO_PIN7_WAKEUP_ENABLE
GPIO_PIN7_INT_TYPE
GPIO_PIN7_DRIVER
GPIO_PIN7_SOURCE
18 0x0012 0x60000348 GPIO_PIN8
GPIO_PIN8_WAKEUP_ENABLE
GPIO_PIN8_INT_TYPE
GPIO_PIN8_DRIVER
GPIO_PIN8_SOURCE
19 0x0013 0x6000034C GPIO_PIN9
GPIO_PIN9_WAKEUP_ENABLE
GPIO_PIN9_INT_TYPE
GPIO_PIN9_DRIVER
GPIO_PIN9_SOURCE
20 0x0014 0x60000350 GPIO_PIN10
GPIO_PIN10_WAKEUP_ENABLE
GPIO_PIN10_INT_TYPE
GPIO_PIN10_DRIVER
GPIO_PIN10_SOURCE
21 0x0015 0x60000354 GPIO_PIN11
GPIO_PIN11_WAKEUP_ENABLE
GPIO_PIN11_INT_TYPE
GPIO_PIN11_DRIVER
GPIO_PIN11_SOURCE
22 0x0016 0x60000358 GPIO_PIN12
GPIO_PIN12_WAKEUP_ENABLE
GPIO_PIN12_INT_TYPE
GPIO_PIN12_DRIVER
GPIO_PIN12_SOURCE
23 0x0017 0x6000035C GPIO_PIN13
GPIO_PIN13_WAKEUP_ENABLE
GPIO_PIN13_INT_TYPE
GPIO_PIN13_DRIVER
GPIO_PIN13_SOURCE
24 0x0018 0x60000360 GPIO_PIN14
GPIO_PIN14_WAKEUP_ENABLE
GPIO_PIN14_INT_TYPE
GPIO_PIN14_DRIVER
GPIO_PIN14_SOURCE
25 0x0019 0x60000364 GPIO_PIN15
GPIO_PIN15_WAKEUP_ENABLE
GPIO_PIN15_INT_TYPE
GPIO_PIN15_DRIVER
GPIO_PIN15_SOURCE
26 0x001a 0x60000368 GPIO_SIGMA_DELTA
SIGMA_DELTA_ENABLE
SIGMA_DELTA_PRESCALAR
SIGMA_DELTA_TARGET
27 0x001b 0x6000036C GPIO_RTC_CALIB_SYNC RTC_CALIB_START
RTC_PERIOD_NUM
28 0x001c 0x60000370 GPIO_RTC_CALIB_VALUE RTC_CALIB_RDY
RTC_CALIB_RDY_REAL
RTC_CALIB_VALUE
Appendix 1 GPIO Registers
BitPos SW(R/W) Description
[31:16] R/W BT-Coexist Selection register
[15:0] R/W The output value when the GPIO pin is set as output.
[31:16]
[15:0] WO Writing 1 into a bit in this register will set the related bit in GPIO_OUT_DATA
[31:16]
[15:0] WO Writing 1 into a bit in this register will clear the related bit in GPIO_OUT_DATA
[31:22]
[21:16] R/W SDIO-dis selection register
[15:0] R/W The output enable register.
[31:16]
[15:0] WO Writing 1 into a bit in this register will set the related bit in GPIO_ENABLE_DATA
[31:16]
[15:0] WO Writing 1 into a bit in this register will clear the related bit in GPIO_ENABLE_DATA
[31:16] The values of the strapping pins.
[15:0] The values of the GPIO pins when the GPIO pin is set as input.
[31:16]
[15:0] R/W Interrupt enable register.
[31:16]
[15:0] WO Writing 1 into a bit in this register will set the related bit in GPIO_STATUS_INTERRUPT
[31:16]
[15:0] WO Writing 1 into a bit in this register will clear the related bit in GPIO_STATUS_INTERRUPT
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:11]
[10] R/W 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5
0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-
[9:7] R/W
level
[6:3]
[2] R/W 1: open drain; 0: normal
[1]
[0] R/W 1: sigma-delta; 0: GPIO_DATA
[31:17]
[16] R/W 1: enable sigma-delta; 0: disable
[15:8] R/W Clock pre-divider for sigma-delta.
[7:0] R/W target level of the sigma-delta. It is a signed byte.
[31] R/W Positvie edge of this bit will trigger the RTC-clock-calibration process.
[30:10]
[9:0] R/W The cycle number of RTC-clock during RTC-clock-calibration
[31] 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done
[30] 0: during RTC-clock-calibration; 1: RTC-clock-calibration is done
[29:20]
The cycle number of clk_xtal (crystal clock) for the RTC_PERIOD_NUM cycles of RTC-
[19:0]
clock