Slave Status Definition And Line Breakage; Status Definition; Gpio0 Line Breakage; Esp8266 Spi Slave Api Functions - Espressif ESP8266 Technical Reference

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read/write data: length, 256 bits (32 Bytes). Master output slave input (MOSI) the
0x02 command, or master input slave output (MISO) the 0x03 command.
slave status: length, 8 bits; master input slave output (MISO), use 0x04 or 0x05 to
read the slave communication status.
6.3. Slave Status Definition and Line Breakage
6.3.1. Status Definition
The slave status contains 8 bits:
wr_busy, bit0: 1, slave write buffer is full, and is processing the data received; 0,
slave write buffer is empty, new data can be written in.
rd_empty, bit1: 1, slave read buffer is empty, no data has been updated; 0, there is
new data in the buffer for the master to read.
comm_cnt, bit2-4: count value of the read/write communication. Each time when
the slave SPI read/write buffer is interrupted, this 3-bit count value will increase by 1.
Therefore, the master can judge whether the readwrite communication has been
recognised by the slave, and whether the communication is completed.
⚠ Notice:
When the master completed a read/write communication, if it wants to conduct the next read operation,
rd_empty must be 0, and comm_cnt value must be the previous value +1; if it wants to conduct the next
write operation, wr_busy must be 0, and comm_cnt value must be the previous value +1.

6.3.2. GPIO0 Line Breakage

When there are changes in the slave status register, interrupt line GPIO0 will be set to be 1;
when the master uses 0x04, 0x05 to read the slave status register, interrupt line GPIO0 will
be set 0.

6.4. ESP8266 SPI Slave API Functions

⚠ Notice:
Configure in spi.h if SPI status register single-threaded passthrough protocol is used.
//SPI protocol selection
#define TWO_INTR_LINE_PROTOCOL
#define ONE_INTR_LINE_31BYTES
#define ONE_INTR_LINE_WITH_STATUS
The interrupt response function will use spi_slave_isr_sta(void *para).
Espressif
6. SPI Wi-Fi Passthrough 1-Interrupt Mode
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2016.05

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