Block Diagram Of The Max 10 Plus - Terasic MAX10-Plus User Manual

• Ten red user LEDs
• Two 7-segment displays
• Three 50MHz clock sources from the clock generator
• 24-bit CD-quality audio CODEC with line-in, line-out jacks
• On-board microphone
• HDMI RX, incorporates HDM v1.4a features, including 3D video supporting
• Gigabit Ethernet PHY with RJ45 connector
• UART to USB, USB Mini-B connector
• One ambient light sensor
• One humidity and temperature sensor
• One accelerometer
• One external 16bit digital-to-analog converter (DAC) device with SMA output
• Potentiometer input to ADC
• Two MAX 10 FPGA ADC SMA inputs
• One 2x10 ADC header with 16 analog inputs connected to MAX10 ADCs

2.2 Block Diagram of the MAX 10 Plus

Figure 2-2 is the block diagram of the board. All the connections are established through the MAX
10 FPGA device to provide maximum flexibility for users. Users can configure the FPGA to
implement any system design.
MAX 10 Plus User
Manual
Figure 2-2 Block Diagram of MAX 10 Plus Board
7 www.terasic.com
May 31, 2019