L-Card ADC Series User Manual page 5

3.5. All functional differences of E-502 and L-502. ............................................................. 29
CHAPTER 4. CONNECTION OF SIGNALS. ........................................................... 30
4.1. DGND, AGND circuits ..................................................................................................... 30
4.2. GND, 0 V, GND_USB, CHASSIS circuits ..................................................................... 30
4.3. Location of DGND, AGND, GND, 0 V, GND_USB, CHASSIS circuits on the board
30
4.4. E-502 connectors description .......................................................................................... 31
4.4.1. Connector Analog. ........................................................................................................... 31
4.4.2. Connector Digital. ............................................................................................................ 34
4.4.3. JTAG connectors of Blackfin processor. ........................................................................ 39
4.4.4. Connectors JTAG and UART0 of the ARM controller LPC-4333 (LPC-4337). ........ 39
4.5. The maximum allowable conditions at the inputs and outputs of signal lines. ....... 40
4.6. ADC input operation voltage range ............................................................................... 41
4.7. Preconditions for correct connection and correct settings of the input of the ADC
E-502.............................................................................................................................................. 43
4.7.1. The physical causes of possible problems ...................................................................... 43
4.7.2. Conditions for correct E-502 connection and settings. .................................................. 43
4.8. Calculation of total load power of E-502 output circuits ............................................ 44
CHAPTER 5. SPECIFICATIONS. ............................................................................. 46
5.1. ADC ..................................................................................................................................... 46
5.1.1. Limits of the permissible relative basic error of measuring the AC voltage ................ 47
5.1.2. ADC own input noise. ..................................................................................................... 47
5.1.3. ADC inter-channel passing.............................................................................................. 48
5.2. DAC. .................................................................................................................................... 48
5.2.1. AC voltage playback error ............................................................................................... 48
5.3. Digital inputs. ..................................................................................................................... 49
5.4. Digital outputs.................................................................................................................... 50
5.5. Synchronization in E-502. ................................................................................................ 50
5.6. Characteristics of standard interfaces. .......................................................................... 51
5.7. Power supply system and galvanic isolation. ................................................................ 52
5.8. Construction specification. .............................................................................................. 53
5.9. Environmental conditions. ............................................................................................... 53
5.9.1. Normal conditions ............................................................................................................ 53
5.9.2. Operating conditions ........................................................................................................ 53
CHAPTER 6. CONNEXION SAMPLES. ................................................................... 54
6.1. ADC entry point connection ............................................................................................ 54