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Summary of Contents for L-Card L-502-P-G-D-I
- Page 1 A family of universal modules of the ADC/DAC Measuring voltage converters L-502-P-G-D-I L-502-P-G L-502-P-G-D L-502-X-G L-502-X-G-D L-502-X-X L-502-X-X-D User manual Revision 1.1.0 October 2017 http://en.lcard.ru en@lcard.ru DAQ SYSTEMS DESIGN, MANUFACTURING & DISTRIBUTION...
- Page 2 Author of the manual Garmanov A.V. L-Card LLC 117105, Moscow, Varshavskoye shosse, 5, block 4, bld. 2 tel.: (495) 785-95-19 fax: (495) 785-95-14 Internet contacts http://en.lcard.ru E-Mail: Sales department: en@lcard.ru Technical support: en@lcard.ru L-502 Module © Copyright 2006-2017, L-Card LLC. All rights reserved.
- Page 3 10.2017 1.1.0 The characteristics according to the results of preparation of the family of L-CARD voltage measuring converters for certification as Means of Measurement are brought into correspondence. Added to item 3.3.8. Paragraph added When reading this document electronically, to facilitate navigation, use the electronic tree of the table of contents (for example, Acrobat Reader), as well as hyperlinks within the document.
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Page 4: Table Of Contents
General description. Contents CHAPTER 1. GENERAL DESCRIPTION..............7 1.1. Order information....................... 8 1.1.1. Order kit ..........................8 1.2. Consumer properties of L-502 in comparison with L-780(М), L-783(М), L-791 ..8 1.3. Appearance and main structural elements ..............11 1.4. Documentation structure for L-502 ................13 CHAPTER 2. - Page 5 3.4. Operation principle and function circuit............... 31 CHAPTER 4. CONNECTION OF SIGNALS............33 4.1. GND, DGND, AGND circuits..................33 4.2. L-502 connectors description..................33 4.2.1. L-502 external signal connector..................33 4.2.2. Connecting the cable shield..................... 33 4.2.3.
- Page 6 General description. 6.1. ADC entry point connection .................... 59 6.1.1. Connecting to the ADC entry point of single-phase voltage source ......59 6.1.2. Connection to ADC input with up to 16 differential voltage sources ......62 6.1.3. Connection to the ADC input for the case where the common wire of the signal sources has a offset potential Ucm of max.
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Page 7: Chapter 1. General Description
L-Card data acquisition system L-502 based on the PCI Express interface of modern computer motherboards. L-502 – this system of the proprietary development of the "L-Card" LLC, it is made on the basis of high-tech production of the company, it provides its own technical support and maintenance. -
Page 8: Order Information
L-502-P-G L-502-P-G-D L-502-X-G L-502-X-G-D L-502-X-X L-502-X-X-D This work on the installation of a DAC can be carried out exclusively in the L-Card, while the original warranty period of 1.5 years for the product L-502 is retained. 1.1.1. Order kit 1. - Page 9 1.2: Consumer properties of L-502 in comparison with L-780(М), L-783(М), L-791 • [G] – only for L-502-░-G-░ (with galvanic isolation) • [D] – only for L-502-░-░-D (with DAC) Table 1-1. Comparison with L-502 c L-780(M), L-783(M) and L-791 Characteristics L-502 L-780(М) L-783(М) L-791...
- Page 10 Chapter 5 Full list of L-502 characteristics – on page Already today, the architecture of the L-502 is not limited to just this one project by L-Card LLC. The new E-502 with USB and Internet interfaces has a continuity of architecture with L-502: Only the interface with the PC with the same functionality as the L-502 was subjected to processing, except for small functional differences.
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Page 11: Appearance And Main Structural Elements
1.3: Appearance and main structural elements 1.3. Appearance and main structural elements Depending on the version of the module (item , p. ), there are differences in the location of the inter-module sync connector and the output enable connector. Unlike the previous versions, in version 3, an angular synchronization connector is used, which allows connecting the synchronization cable when the L-502 module is already inserted and fixed in the system unit along with the installed adjacent PCI-Express modules. -
Page 12: Fig. 1-3. L-502 Version 1 Or 2 (Face Layout)
General description. Разъём Output resolution Разъём Backup boot Elements Элементы конфигурации конфигурации configuration configuration Название of galvanic Module гальвано- разрешения резервной connector connector модуля развязки isolation name выхода загрузки (s.2.1.3) Внешний Eternal (2.1.1) (п.2.1.3) (п.2.1.1) сигнальный signal разъём Intermodule Разъём Внутренний... -
Page 13: Documentation Structure For L-502
1.4: Documentation structure for L-502 Кронштейн для Bracket for крепления в mounting in the системном блоке system unit. ОЗУ - Процессор - Blackfin SDRAM SDRAM Blackfin processor 32 MB 32 MB Fig.1-4. L-502 (back layout) 1.4. Documentation structure for L-502 A complete guide to the L-502 is divided into four separate books: •... -
Page 14: Chapter 2. Installation And Configuration
Installation and configuration. Chapter 2. Installation and configuration. 2.1. Configuration L-502. Here, the hardware settings of the L-502 are considered, which must be done before the L-502 module is installed in the computer. These settings are made by jumper, which you need to put (or not) on the corresponding pair of contacts, indicated below in the tables with conditional numbers. -
Page 15: The Configuration Of The Outputs Dac1 And Dac2
2.1: Configuration L-502. 2.1.2. The configuration of the outputs DAC1 and DAC2 No jumper on 3,4,5,6 The contact "DAC1" is not connected to the external signal 4.2.1 connector, see item , p. Jumper on 3-4 The contact "DAC1" on the connector is connected to the DAC - channel 1 Jumper on 3-5... -
Page 16: Installing The L-502 In Your Computer
Installation and configuration. 2.2. Installing the L-502 in your computer The L-502 module can be installed in any PCI Express card slot of any size (x1, x2, x4, x8, x12, x16 and x32) from 1.0 to 3.0. Before installing the L-502 in the computer, set the configuration jumper to the desired i. -
Page 17: Serial Number. L-502 Version Number. Module Identification In A Multi-Module Configuration
2.4: Serial number. L-502 version number. Module identification in a multi-module configuration Green light L-502 is in the synchronous I/O mode. No lights Power is off. If more than one L-502 module is used in the computer's system unit, the task is to identify the module with which the program is currently running. -
Page 18: Software Installation
Installation and configuration. 2.5. Software installation To install the necessary drivers and libraries for Windows OS, you must download and run the installer "L-Card L502 / E502 SDK" http://www.lcard.ru/download/lpcie_setup.exe. For information on installing the driver and libraries under Linux OS, see Programmer... -
Page 19: Chapter 3. The Device And Principle Of Operation L-502
3.1.3. The agreement on the terms "card", "board" and "module" Literary PCI or PCI-E is translated as a card (in this case, even a L-card ). But many call it a board. Following the terms, in this manual we will adhere to the more strict name of this constructive unit, adopted in the ESKD - module. - Page 20 The device and principle of operation L-502. modification L-502-P-░-░) is The presence of the ADSP-BF523 signal processor with RAM ( considered justified for those users who want to get a maximum of on-board signal processing capabilities on-board, as well as advanced users to have their own low-level processor programming, possibly using a JTAG emulator.
- Page 21 3.2: Introduction (L-502 concept) for example, configuration is possible: 8-bit 2-way data bus + up to 10 data bits per input + up to 8 data bits per output. This allows the implementation of bus diagrams controlling complex digital 4.2.3.1 devices (item , p.
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Page 22: Operation Principle
The device and principle of operation L-502. 3.3. Operation principle In the section 3.2 the concept of the L-502 project was summarized, where the main principles of the module operation were listed. This section contains further details. 3.3.1. Reference frequency –... -
Page 23: Digital Input Channel
3.3: Operation principle can be 2.0 or 1.5 MHz for an internal synchronization or ≤2.0 MHz for an external, where f = {1,2,…, 256}, n ={1,2,…,2097152}, n ={0,1,…,2097151}. к fig. 3-1 The above-mentioned frame structure of the ADC data is shown in . -
Page 24: General Principle For Synchronization In L-502
The device and principle of operation L-502. 3.3.4.1. Restrictions on the current implementation of asynchronous output during external synchronization. Asynchronous output to digital lines and to DAC in the operating mode will always work when configured for internal synchronization. But asynchronous output to digital lines and to the DAC will not function in the standby mode for external synchronization of the start of data acquisition or waiting for more than 1 μs of the external clock of the ADC conversion. -
Page 25: Fig. 3-2. L-502 Synchronization System Structure
Fig. 3-2. L-502 synchronization system structure 3.3.5.2. Secondary synchronization. The functionality of the secondary synchronization is embedded in the project, but is not currently implemented. You can find out about the availability of this functionality in the sales department of L-Card. -
Page 26: Setting The Ratio Between The Time Of Setting The Signal And The Resolution For Each Channel Of The Adc Is A Unique Possibility Of The L-502
The device and principle of operation L-502. The secondary synchronization circuit (II) is the ADC data selection circuit depending on the secondary synchronization conditions, operating exclusively against the background of the previously started clock signal from the output of the primary synchronization circuit (I), i.e. against the background of the started data stream of the ADC. -
Page 27: Fig. 3-3. The Principle Of Obtaining Adc Data (In Detail)
3.3: Operation principle switching period. L-502 has, by default, that for n > 1 all ADC readouts are flipped, except for the last one, during the switching period - this creates the greatest time for setting the signal after switching (due to "idle" ADC conversion cycles), therefore the least stringent requirements are fig. -
Page 28: Relative Switching Delays In Adc Channels
The device and principle of operation L-502. It can be argued that by setting optimal n settings for each channel, we are trying to optimize the timing of the signal conditioning associated with the inter-channel passage and the resolution of the ADC. It is important to note that in the L-502, the ADC averaging algorithm described here (by the simple average method) is considered as an inseparable part of the analog-to-digital converter itself, although physically the averaging procedure is performed by means of FPGA using 24-bit integer... -
Page 29: Relative Delays Of The Adc, Dac And I/O Channels
3.3: Operation principle 3.3.8. Relative delays of the ADC, DAC and I/O channels. ST_SU CONV_OUT START_OUT ST_H X, Y, GND32 ADC_SU Выборка Выборка Sample Выборка Sample Внутренний Sample Internal 1-го отсчёта АЦП 1st ADC count 3-го отсчёта АЦП 2-го отсчёта АЦП 3rd ADC count 2nd ADC count преобразо-... - Page 30 The device and principle of operation L-502. Description Desig- Timing sample nation Minimum Typical Maximum The time to set the state "1" to 45 ns ST_SU START_OUT before the front CONV_OUT (start of data collection) Hold time of state "1" to START_OUT 150 ns ST_H after the front CONV_OUT...
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Page 31: Operation Principle And Function Circuit
3.4: Operation principle and function circuit 3.4. Operation principle and function circuit Только для L-502- - -D Only for CONV_IN, START_IN Подсистема ввода-вывода Схема L-502 primary sub-system ЦАП DAC1, DAC2 первичной CONV_OUT, START_OUT synchronization синхронизации scheme L-502 DI_SYN1, DI_SYN2 DO1...DO16 Цифровой... - Page 32 The device and principle of operation L-502. signal processor. The interface of the processor with the computer is through the HOST port of the DMA processor. The signal processor has 32 MB SDRAM (L-502-P-░-░). When the computer's power is turned on, before the BIOS of the computer starts initializing fig.
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Page 33: Chapter 4. Connection Of Signals
4.1: GND, DGND, AGND circuits. Chapter 4. Connection of signals. This chapter provides information on the L-502 connectors, the assignment of their contacts, and the main characteristics of the L-502 inputs and outputs related to the correct connection. 4.1. GND, DGND, AGND circuits. L-502 has the following the following conventions for earth circuits (or "common wire"... -
Page 34: Table 4-1: Eternal Signal Connector
Connection of signals. AGND GND32 DAC1 / +15V / AGND DI_SYN1 DAC2 / -15V / DGND Fig. 4-1: Eternal signal connector Table 4-1: Eternal signal connector Signal name Comm Direc- Description tion point • Non-inverting channel voltage input 1 ... 16 for differential and X<1…16>... - Page 35 4.2: L-502 connectors description. Signal name Comm Direc- Description tion point programmatically. DAC1 AGND Output For modifications, the L-502-░-░-D can be configured with a jumper as the output of the 1st DAC channel (voltage output in the range -5 ... / +15 V + 5 V).
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Page 36: Internal Signal L-502 Connector
Connection of signals. 4.2.3. Internal signal L-502 connector. The internal signal connector means a 40-pin 2-row BH-40 type plug intended for connecting a flat cable inside the system unit. It is possible to use the finished AC-7xx-m AC-7xx-f cable with the use of an additional adjacent crate slot in the PC system unit. DGND DGND +3,3V... -
Page 37: Table 4-2: Internal Signal Connector
4.2: L-502 connectors description. Table 4-2: Internal signal connector Comm Signal Direc- State after Description name tion connection point DI<16…1> DGND Input Input 16-bit digital input, where DI1 is the low bit, DI16 is the high bit of the 16-bit word. -
Page 38: Internal Connector Of Intermodule Synchronization
Connection of signals. 4.2.3.1. What gives an independent resolution to the outputs of the high and low byte? One of the important practical examples is a system of 3 buses with a width of 8 bits each, as shown in the figure below. The first bus is the input one, the second is the output bus, the third is bi- directional. -
Page 39: Table 4-3: Intermodule Synchronization Connector
4.2: L-502 connectors description. CONV_IN DGND Fig. 4-5: Intermodule synchronization connector (L-502 CONV_OUT DGND version 3). START_IN DGND Внутренний Internal DGND START_OUT Разъём Output enable сигнальный signal конфигурации разъём configuration connector разрешения connector выхода Table 4-3: Intermodule synchronization connector Commo Direc- State after Signal name... -
Page 40: Fig. 4-6: Multi-Module Synchronization Scheme
Connection of signals. L-502 L-502 L-502 (ведомый) (ведущий) (ведомый) (slave) (slave) (master) Fig. 4-6: Multi-module synchronization scheme Ведомый #2 Slave #2 Ведомый #1 Slave #1 Ведущий Master Fig. 4-7: The scheme of multi-module synchronization of three L-502 version 3 (top view of the computer's motherboard) The synchronization cable for a pair of L-502 modules, which, if necessary, must be ordered separately, is designed to connect two L-502 modules. -
Page 41: Jtag Connector
If you intend to use the L-502-SYNC cable together with the old versions of 1 or 2 L-502 modules, then the cable connector housing should be shortened (this modification will be made by the L-Card at your request). 4.2.5. JTAG connector. -
Page 42: The Maximum Allowable Conditions At The Inputs And Outputs Of Signal Lines
Connection of signals. 4.3. The maximum allowable conditions at the inputs and outputs of signal lines. Under the maximum permissible conditions are meant such currents and voltages that do not lead to failure or irreversible degradation of the characteristics of the L-502. At the same time, the maximum permissible conditions may not provide the performance characteristics of the product. - Page 43 4.3: The maximum allowable conditions at the inputs and outputs of signal lines. 10 kV / μs The maximum permissible voltage rise rate between galvanically isolated circuits in L-502-░- G-░ The maximum permissible circuit modes of the JTAG connector are not considered, since the JTAG designated area is strictly limited to specific types of JTAG emulators and the specified 4.2.5 connection procedure, according to section...
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Page 44: Adc Input Operation Voltage Range
Connection of signals. 4.4. ADC input operation voltage range Note that in the differential mode on the subbands ± 10, ± 5 V, the L-502 has unbalanced input signal ranges of the inputs X and Y with regard to the analog ground circuit AGND, and in the "common ground"... -
Page 45: Necessary Conditions For Correct Connection And Correct Settings Of The Input Of The Adc L-502
45 4.5: Necessary conditions for correct connection and correct settings of the input of the ADC L-502. Отдалённая группа одноф азны х И Н Remote single-phase VS group Отдалённы е одноф азны е И Н и диф ф . реж им L-502 Remote single-phase VS and diff. -
Page 46: Conditions For Correct Connection And Settings L-502
Connection of signals. band up to 10 MHz are always present in the real situation, and also in the situation of the user's failure to apply a differential connection (and adjustment to the differential mode), and therefore use the valuable property of a differential input – effectively suppressing common-mode interference. - Page 47 47 4.5: Necessary conditions for correct connection and correct settings of the input of the ADC L-502. 3.3.6 9. In multi-channel mode, the optimal settling time n ) should be selected depending on the output impedance of the signal source, the length and the coherence of the cable.It is suggested to choose the optimal n for this channel by the criterion of obtaining a small inter-channel signal transmission from the previous polling...
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Page 48: Calculation Of The Total Load Power Of L-502 Output Circuits
Connection of signals. 4.6. Calculation of the total load power of L-502 output circuits If you intend to use L-502 output circuits to connect any external loads, then the total load power should not exceed the power specified in the specification (see section on p. -
Page 49: Chapter 5. Specifications
Chapter 5. Specifications. The following specifications indicate the main parameters of the L-502 for its intended - operating mode. For the maximum permissible voltages and currents at the contacts of the connectors, see section , on p. 5.1. ADC. Parameter Value Number of channels 16 differential or... -
Page 50: Limits Of The Permissible Relative Basic Error Of Measuring The Ac Voltage
Common-mode rejection ratio 50 Hz with 1 V amplitude in differential mode on sub-band: ±10 V 77 dB ±5 V 83 dB ±2 V 90 dB ±1 V 92 dB ±0.5 V 92 dB ±0.2 V 92 dB Resistance to overloads by input measuring signal of DC voltage ±15 V Limits of the permissible relative fundamental error of the ADC ±0.005 %... -
Page 51: Adc Own Input Noise
5.1.2. ADC own input noise. Below are the typical noise levels without taking into account the factors of temperature and long-term zero drift for 1-channel mode with a shorted ADC input. Data entry rate, Averaging ADC subrange, V Kword/s factor ±10 ±5 ±2... -
Page 52: Dac
5.2. DAC. Parameter Value Number of channels Output frequency in synchronous mode 1 Mcount/s per channel Output frequency in asynchronous mode The actual speed depends on many factors of the software and hardware environment. DAC bit depth, bit Output modes Synchronous (streaming), asynchronous Output signal range ±5 V... -
Page 53: Digital Inputs
5.3. Digital inputs. Parameter, characteristics Value, description Total number of digital inputs (DI1-DI16, DI_SYN1, DI_SYN2) Of these, the number of digital inputs with synchronization function (DI_SYN1, DI_SYN2) Data entry modes Synchronous, asynchronous Program control of pull-up resistors activation: - for inputs DI1-DI16 Regardless of the high and low byte - for inputs DI_SYN1, DI_SYN2... -
Page 54: Digital Outputs
5.4. Digital outputs. Parameter Value Number of digital outputs of general purpose Control of the third state of outputs Byte Data entry modes Synchronous, asynchronous Maximum speed in synchronous mode 1 KWords/s Maximum speed in asynchronous mode the actual speed depends on many factors of the software and hardware environment. -
Page 55: Intermodule Synchronization Interface
5.5.2. Intermodule synchronization interface Parameter Value Topology of multimodule connections over synchronization lines Sequence Maximum number of synchronized L-502 modules in a serial Equal to the number of PCI-E slots in synchronization scheme the PC motherboard Maximum cable length of the intermodule synchronization 40 mm (only for an adjacent module PCI-E) Number of intermodule synchronization lines... -
Page 56: Power Supply System And Galvanic Isolation
5.7. Power supply system and galvanic isolation. Parameter, characteristics Value, description L-502 modifications, which have galvanic L-502-P-G, L-502-P-G-D, L-502-X-G, L-502-X-G-D isolation The condition of galvanic isolation in a If in all connected L-502 there is galvanic isolation system of several L-502 connected via a synchronization interface Galvanic isolation border Between all circuits that come to the contacts of signal... - Page 57 Maximum power consumed from PCI 6 W (for L-502-X-░-░) Express unit 7.6 W (for L-502-P-░-░) Maximum permissible through-current by the circuits of one L-502 module: AGND-DGND 100 mA GND-DGND (L-502 without galvanic 100 mA isolation) GND-AGND (L-502 without galvanic 100 mA isolation) Maximum permissible through currents along AGND-AGND, AGND-DGND,...
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Page 58: Construction Specification
5.8. Construction specification. Parameter Value Construct PCI Express CARD x1 of standard height, with bracket, in length - less than half the size (HALF LENGTH), according to PCI Express Card Electromechanical Specification rev.2.0. Requires one PCI Express crate slot. Overall dimensions of the printed circuit board 136 x 101 mm - length x height... -
Page 59: Chapter 6. Connexion Samples
Chapter 6. Connexion samples. These connection examples should be considered together with the recommendations for connecting and configuring the L-502 (n. The short form of information provided in this chapter does not cover all the features of the connection for your particular case. If necessary, please contact: en@lcard.ru or in the conference on the site... - Page 60 X1 (X2 -X16) Y1 (Y2 -Y16) L-502 L-502 AGND AGND 6.1.1.3. Voltage divisor. 6.1.1.4. Voltage divisor. Mode "with common ground" "Differential" mode X1 (X2-X16, Y1-Y16) X1 (X2 -X16) L-502 L-502 Y1 (Y2 -Y16) GND32 AGND AGND The voltage transfer ratio is R2/(R1+R2). It is necessary that R1 or R2 should not be more than 50 ohms if the switching frequency is maximal.
- Page 61 The connection is recommended for single-channel mode. R should be located close to the L-502 entry. 6.1.1.9. Closed entry with divider. Mode 6.1.1.10. Closed entry with divider. "with common ground" "Differential" mode С С X1 (X2-X16, Y1-Y16) X1 (X2-X16, Y1-Y16) L-502 L-502 GND32...
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Page 62: Connection To Adc Input With Up To 16 Differential Voltage Sources
6.1.2. Connection to ADC input with up to 16 differential voltage sources 6.1.2.1. General case X1 (X2-X16) Uвх L-502 Y1 (Y2 -Y16) AGND Only for voltage subranges of L-502: ± 2 V, ± 1 V, ± 0.5 V, ± 0.2 V. 6.1.2.2. -
Page 63: Connection To The Adc Input For The Case Where The Common Wire Of The Signal
Only for voltage subbands: Only for voltage subbands: ±2 V, ±1 V, ±0.5 V, ±0.2 V ±2 V, ±1 V, ±0.5 V, ±0.2 V 6.1.2.5. Differential winding connection 6.1.2.6. Differential winding connection with midpoint with midpoint through the divider X1 (X2 -X16) X1 (X2 -X16) AGND AGND... -
Page 64: Measurement Of The Voltage Drop On The Circuit Section In The Differential Mode (Up To 16- Channels)
6.1.4. Measurement of the voltage drop on the circuit section in the differential mode (up to 16- channels) This connection allows you to measure the voltage X1 (X2 -X16) drop across resistor R2. For a single-channel mode, R1, R2, R3 can also be impedances of a capacitive or inductive nature, but with the condition that the circuits X and Y used are not broken by the direct current of the circuit. -
Page 65: Connecting A Power Supply To The Adc Input
6.1.7. Connecting a power supply to the ADC input 6.1.7.1. Mode "with common ground" 6.1.7.2. Differential mode X1 (X2-X16, Y1-Y16) X1 (Y2 -Y16) L-502 L-502 GND32 Y1 (X2-X16) AGND AGND Fixed ADC ± U subband must correspond to U=I *R, and the current source must have a voltage margin of at least U. -
Page 66: Consistent Connection Of Remote Current Sources Or Voltage Through A Long Line With A Wave Resistance Of Zw With Load On The Side Of The Receiver
6.1.8. Consistent connection of remote current sources or voltage through a long line with a wave resistance of Zw with load on the side of the receiver. (If the signal source has an output impedance, unequal to Zw, then these cases correspond to one-way matching of the long line on the side of the signal receiver) 6.1.8.1. -
Page 67: With A Wave Resistance Zw With Matching On The Signal Source Side
6.1.10. The coordinated connection of a remote voltage source through a pair of long line with a wave resistance Zw with matching on the signal source side Источник Voltage напряжения source =Zв/2 ВН X1 (Y2 -Y16) R=Zв R=Zв/2 Y1 (Y2-Y16) L-502 AGND –... -
Page 68: Connecting The Dac Outputs
6.2. Connecting the DAC outputs. To realize the DAC function in L-502-░-░-D, the outputs DAC1 and DAC2 must be 2.1.2 preconfigured with jumper, see section on p. 6.2.1. 2-channel output ±5 V 6.2.2. Single-channel differential output ±10 DAC1 DAC1 DAC2 L-502 ±10В... -
Page 69: Connecting The Digital Inputs And Outputs
6.3. Connecting the digital inputs and outputs. 6.3.1. Connecting the LED or the optron input. Option 1 The LED is lit when the DO output is at the DO (1-16) "logical unit". L-502 6.3.2. Connecting the LED or the optron input. Option 2 The LED is lit when the DO output is at the +3.3V "logical zero". - Page 70 6.3.3.3. Connect the optron output to the synchronization input The digital inputs DI_SYN1,2, which can be used DI_SYN1 DI_SYN2 as synchronization inputs, are adapted to directly connect the optron output. The internal pull-up L-502 resistor of the DI_SYN1,2 input must be software- enabled.
- Page 71 Chapter 7. Dimensional drawing The dimensions are in millimeters.
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Page 72: Bibliography
Bibliography. L-502. Programmer guide. - M.: L-Card, 2013 Low-level programmer manual for the L-502 board. - M .: L-Card, 2013 A. V. Garmanov. - "Connection of measuring devices. Electrical compatibility and noise immunity". - M.: L-Card, 2003 Terminology for measuring systems – technical support section on the L-Card website: www.lcard.ru/lexicon... - Page 73 Fig. 4-7: The scheme of multi-module synchronization of three L-502 version 3 (top view of the computer's motherboard) ........................ 40 Fig. 4-8: Intermodule synchronization cable L-502-SYNC ..............41 Fig. 4-9. JTAG ............................41...