Allen-Bradley 1779-KFMR User Manual page 74

Where the fields of the frame are as follows:
FLG is the flag sequence field (one byte).
ADR is the RS-422/449 link address field (one byte).
CTL is the control field (one byte).
DATA is the data field (variable length).
FCS is the frame check sequence field (two bytes).
Although we express the field lengths in bytes for convenience, extra bits
are often inserted into fields ("Zero-Bit Insertion"). With an extra bit
inserted, a field would no longer be an even multiple of eight bits. The
FLG, ADR, CTL, and FCS fields are required. However, some types of
frames do not have DATA fields. Without a data field, the frame structure
is:
Time
FLG ADR CTL
Flag Sequence Field
All frames start and end with the flag sequence. This sequence is a zero
bit followed by 6 one bits followed by a zero bit (01111110). A receiver
must continuously hunt, on a bit-by-bit basis, for this sequence.
The flag sequence which closes a frame may also be the opening flag
sequence for the next frame. Also, any number of complete flags may be
used between frames. The flag is used for frame synchronization.
A transmitter must send only complete 8-bit flag sequences; however, a
receiver should accept the sequence of 011111101111110 as two flag
sequences.
In order for flags to provide accurate synchronization, a transmitter must
never send the flag sequence in any other field. The transmitter avoids
this by a zero-bit insertion procedure described in "Zero-Bit Insertion."
Chapter 6
HDLC Data Link Layer
FCS FLG
2 Bytes
6 5