Quectel EG91 Series Hardware Design page 29

DBG_RXD 22
PCM Interface
Pin Name Pin No.
PCM_DIN 6
PCM_
7
DOUT
PCM_SYNC 5
PCM_CLK 4
I2C Interface
Pin Name Pin No.
I2C_SCL 40
I2C_SDA 41
EG91_Hardware_Design
DI Receive data
I/O Description
DI PCM data input
DO PCM data output
PCM data frame
IO synchronization
signal
IO PCM clock
I/O Description
I2C serial clock.
OD Used for external
codec
I2C serial data.
OD Used for external
codec
V min=-0.3V
IL
V max=0.6V
IL
V min=1.2V
IH
V max=2.0V
IH
DC Characteristics
V min=-0.3V
IL
V max=0.6V
IL
V min=1.2V
IH
V max=2.0V
IH
V max=0.45V
OL
V min=1.35V
OH
V max=0.45V
OL
V min=1.35V
OH
V min=-0.3V
IL
V max=0.6V
IL
V min=1.2V
IH
V max=2.0V
IH
V max=0.45V
OL
V min=1.35V
OH
V min=-0.3V
IL
V max=0.6V
IL
V min=1.2V
IH
V max=2.0V
IH
DC Characteristics
28 / 93
LTE Module Series
EG91 Hardware Design
open.
1.8V power domain.
If unused, keep it
open.
Comment
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
In master mode, it is
an output signal. In
slave mode, it is an
input signal.
If unused, keep it
open.
1.8V power domain.
In master mode, it is
an output signal. In
slave mode, it is an
input signal.
If unused, keep it
open.
Comment
An external pull-up
resistor is required.
1.8V only.
If unused, keep it
open.
An external pull-up
resistor is required.
1.8V only.
If unused, keep it
open.