Multi-Function Timer Interrupts - Motorola MC68HC05T16 Technical Data Manual

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VFLB - VFLBK status
1 (set)
Vertical flyback (leading edge) signal detected.
0 (clear) –
No Vertical flyback signal detected.
RiCF - Row i display status
1 (set)
Row i display has been terminated.
0 (clear) –
Row i display has been not terminated.
Whenever a row display has been terminated, the corresponding RiCF flag will be set along with
update of CDRC3-CDRC0 field.
Refer to section 9 for detailed description of On-Screen Display.
4.2.8

Multi-Function Timer Interrupts

There are two different interrupting sources, TOF and RTIF bits of Multi-Function Timer Register,
in this module. The interrupt service routine address is specified by the contents of memory
location $FFF0 and $FFF1.
Multi-Function Timer
TOF - Timer Overflow
1 (set)
8-bit ripple timer overflow has occurred.
0 (clear) –
No 8-bit ripple timer overflow has occurred.
This bit is set when the 8-bit ripple counter overflows from $FF to $00; a timer overflow interrupt
will occur, if TOFIE (bit 5) is set. TOF is cleared by writing a '0' to the bit.
RTIF - Real Time Interrupt Flag
1 (set)
A real time interrupt has occurred.
0 (clear) –
A real time interrupt has not occurred.
A RTIF indicates when the output of the RTI circuit goes active. The clock frequency that drives
the RTI circuit is E/16384 giving a maximum interrupt period of 3.9ms at a bus rate of 4.2MHz. A
CPU interrupt request will be generated if RTIE is set. RTIE is cleared by writing a '0' to the bit.
MC68HC05T16
Address bit 7
bit 6
bit 5
$1C
TOF
RTIF
TOFIE
RESETS AND INTERRUPTS
bit 4
bit 3
bit 2
bit 1
RTIE
IRQN WDOG
RT1
4
State
bit 0
on reset
RT0
0000 0011
TPG
MOTOROLA
4-11

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