Cisco EHWIC-4SHDSL-EA Configuration Manual page 34

Enhanced high-speed wan interface card
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Troubleshooting Cisco G.SHDSL EFM/ATM
GDF Ring 2 Interrupt Enables:
Rx Frame Drop Int
Generic Frame Rx Int
GDF Ring 1 Interrupt Enables:
Rx Frame Drop Int
Generic Frame Rx Int
GDF Ring 0 Interrupt Enables:
Rx Frame Drop Int
Generic Frame Rx Int
IRQ2 Int
Int Frame Network Int
Error Interrupt Event (0xA94B6BF):
GDF Rx Resume Error Event
Rx Done Error Event
Hwic Int Frame Error Event
Tx Done Error Event
IRQ1 Event
Rx Overrun Event
Reg RW Timeout Event
Rx CRC Event
DMA Error Event
Management Interrupt Event (0x9072):
Hwic Int Frame Mgmt Event
IRQ2 Int
IRQ1 Int
Network Interrupt Event (0x24222044):
GDF Ring 3 Interrupt Events:
Rx Frame Drop Event
Generic Frame Rx Event
GDF Ring 2 Interrupt Events:
Rx Frame Drop Event
Generic Frame Rx Event
GDF Ring 1 Interrupt Events:
Rx Frame Drop Event
Generic Frame Rx Event
GDF Ring 0 Interrupt Events:
Rx Frame Drop Event
Generic Frame Rx Event
IRQ2 Event
Int Frame Network Event
HWICRegisterOffset
HWICRegisterTimeout
TxControlFrameCounter
TxDataFrameCounter
RegisterRWErrorCounter
RxCRCErrorCounter
TxBufferExtension
HWICQueueBaseExtension
GDF Ring 0 Registers:
HWICQueueConfig Register
TXQueueTailBase Register
TxQueueBase
TxQueueSize
RxQueueHeadBase Register
RxQueueBase
RxQueueSize
RxBufferSize
RxQueueLowWaterMark
DMAOffsetExtension
DMAOffset
HWICSuspResDbg Register
GDF Ring 1 Registers:
HWICQueueConfig Register
TXQueueTailBase Register
Configuring Cisco Multimode G.SHDSL EFM/ATM in Cisco ISR G2
34
Configuring Cisco Multimode G.SHDSL EFM/ATM in Cisco ISR G2
0
Generic Frame Tx Int
0
0
Generic Frame Tx Int
0
0
Generic Frame Tx Int
1
DMA Write Int
0
IRQ1 Int
0x01
1
0
Card Present Change Event
0x0B
Tx First Last Error Event
1
IRQ2 Event
0
Host Specific Error Event
0
DDR RxClk Missing Event
1
Reg RW Error Event
1
Rx Format Error Event
1
0x09
0
0
Graceful Stop Tx Event
0
Generic Frame Tx Event
0
1
Generic Frame Tx Event
0
0
Generic Frame Tx Event
0
1
Generic Frame Tx Event
0
DMA Write Event
0
IRQ1 Event
0x44
0x0000
HWICRegisterErrorAddress
0x0000C350
0x123AA7
RxControlFrameCounter
0x000002
RxDataFrameCounter
0x0000
RxOverrunErrorCounter
0x0000
RxFrameDropCounter
0x00
RxBufferExtension
0x00
0x0007
HWICQueueBase
0x4048
0x08
TxQueueTail
0x40
TxQueueHead
0x4800
0x09
RxQueueHead
0x40
RxQueueTail
0x060C
RxQueueHighWaterMark
0x00
0x00
0x0000
DMAWindow
0x0000
HWICArbConfig Register
0x0000
HWICQueueBase
0x0000
0
0
1
1
0
0
0
1
1
1
1
1
0
0
0
1
0
0
0
0x00000000
0x117019
0x000000
0x0000
0x0000
0x00
0x1DAD
0x09
0x09
0x00
0x00
0x00
0x0000
0x000F
0x0000

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