Dynamic Engineering PMC-BiSerial-III HW2 User Manual page 5

FIGURE 1 PMC BISERIAL-III BASE BLOCK DIAGRAM
FIGURE 2 PMC BISERIAL-III-HW2 P2P BLOCK DIAGRAM
FIGURE 3 PMC BISERIAL-III-HW2 SDLC BLOCK DIAGRAM
FIGURE 4 PMC BISERIAL-III-HW2 ASYNC BLOCK DIAGRAM
FIGURE 5 PMC BISERIAL III HW2 MANCHESTER TIMING DIAGRAM
FIGURE 6 PMC BISERIAL-II I-HW2 INTERNAL ADDRESS MAP
FIGURE 7 PMC BISERIAL-III BASE CONTROL REGISTER BIT MAP
FIGURE 8 PMC BISERIAL-III DESIGN ID REGISTER BIT MAP
FIGURE 9 PMC BISERIAL-III START SET REGISTER
FIGURE 10 PMC BISERIAL-III START CLEAR REGISTER
FIGURE 11 PMC BISERIAL-III PARALLEL OUTPUT DATA BIT MAP
FIGURE 12 PMC BISERIAL-III DIRECTION CONTROL PORT
FIGURE 13 PMC BISERIAL-III TERMINATION CONTROL PORT
FIGURE 14 PMC BISERIAL-III MUX CONTROL PORT
FIGURE 15 PMC BISERIAL-III UPPER CONTROL PORT
FIGURE 16 PMC BISERIAL-III I/O READBACK PORT
FIGURE 17 PMC BISERIAL-III I/O READBACK PORT
FIGURE 18 PMC BISERIAL-III SWITCH PORT
FIGURE 19 PMC BISERIAL-III PLL CONTROL
FIGURE 20 PMC BISERIAL-III STATE MACHINE CONTROL REGISTERS
FIGURE 21 PMC BISERIAL-III SDLC CONTROL REGISTERS
FIGURE 22 PMC BISERIAL-III SDLC CONTROL REGISTERS
FIGURE 23 PMC BISERIAL-III CHANNEL MODE CONTROL REGISTER
FIGURE 24 PMC BISERIAL-III INTERRUPT STATUS REGISTER
FIGURE 25 PMC BISERIAL-III I2O ADDRESS REGISTER
FIGURE 26 PMC BISERIAL-III PN1 INTERFACE
FIGURE 27 PMC BISERIAL-III PN2 INTERFACE
FIGURE 28 PMC BISERIAL-III FRONT PANEL INTERFACE
List of Figures
Embedded Solutions
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