Holtek HT32F52243 User Manual page 8

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52243/HT32F52253
Channel 2 Output Configuration Register - CH2OCFR ............................................................... 239
Channel 3 Output Configuration Register - CH3OCFR ............................................................... 241
Channel Control Register - CHCTR ............................................................................................. 243
Channel Polarity Configuration Register - CHPOLR .................................................................... 244
Timer PDMA/Interrupt Control Register - DICTR ......................................................................... 245
Timer Event Generator Register - EVGR ..................................................................................... 246
Timer Interrupt Status Register - INTSR ...................................................................................... 248
Timer Counter Register - CNTR................................................................................................... 250
Timer Prescaler Register - PSCR ................................................................................................ 250
Timer Counter Reload Register - CRR ........................................................................................ 251
Channel 0 Capture/Compare Register - CH0CCR ...................................................................... 251
Channel 1 Capture/Compare Register - CH1CCR ...................................................................... 252
Channel 2 Capture/Compare Register - CH2CCR ...................................................................... 253
Channel 3 Capture/Compare Register - CH3CCR ...................................................................... 254
Channel 0 Asymmetric Compare Register - CH0ACR ................................................................. 255
Channel 1 Asymmetric Compare Register - CH1ACR ................................................................. 255
Channel 2 Asymmetric Compare Register - CH2ACR ................................................................. 256
Channel 3 Asymmetric Compare Register - CH3ACR ................................................................. 256
14 Basic Function Timer (BFTM) .......................................................................... 257
Introduction ........................................................................................................................ 257
Features ............................................................................................................................. 257
Functional Description ....................................................................................................... 258
Repetitive Mode ............................................................................................................................ 258
One Shot Mode ............................................................................................................................. 259
Trigger ADC Start.......................................................................................................................... 260
Register Map ..................................................................................................................... 260
Register Descriptions ......................................................................................................... 261
BFTM Control Register - BFTMCR .............................................................................................. 261
BFTM Status Register - BFTMSR ................................................................................................ 262
BFTM Counter Register - BFTMCNTR ........................................................................................ 263
BFTM Compare Value Register - BFTMCMPR ........................................................................... 263
15 Motor Control Timer (MCTM) ........................................................................... 264
Introduction ........................................................................................................................ 264
Features ............................................................................................................................. 265
Functional Descriptions ..................................................................................................... 266
Counter Mode ............................................................................................................................... 266
Clock Controller ............................................................................................................................ 269
Trigger Controller .......................................................................................................................... 269
Slave Controller ............................................................................................................................ 271
Master Controller .......................................................................................................................... 273
Channel Controller ........................................................................................................................ 274
Input Stage ................................................................................................................................... 275
Rev. 1.20 8 of 501 September 19, 2018