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BT800 Hardware Integration Guide
Version 0.2
10.3
Low-voltage VDD_DIG Linear Regulator
The integrated low-voltage VDD_DIG linear regulator is available to power a 0.90 V to 1.25 V supply rail
which includes the digital circuits on CSR8510 WLCSP. The input voltage range is between 1.70 V and
1.95 V.
Externally decouple the output of this regulator using a low ESR MLC capacitor of a minimum 1.5µF to
the VDD_DIG pin. Software enables and controls the output voltage.
10.4
Low-voltage VDD_RADIO Linear Regulator
The integrated low-voltage VDD_RADIO linear regulator is available to power a 1.35 V analogue supply
rail which includes the radio circuits on CSR8510 WLCSP. The input voltage range is between 1.70 V and
1.95 V. Externally decouple the output of this regulator using a low ESR MLC capacitor of a minimum 1.5
µF to the VDD_RADIO pin. Software enables and controls the output voltage. The regulator is disabled
when BT800is in deep sleep or reset.
10.5
Low-voltage VDD_AUX Linear Regulator
The integrated low-voltage VDD_AUX linear regulator is available to power a 1.35V auxiliary supply rail
which includes the VDD_AUX supply on CSR8510 WLCSP. The input voltage range is between 1.70V and
1.95V.
Externally decouple the output of this regulator using a low ESR MLC capacitor of a minimum 470nF to
the VDD_AUX pin. Take VREG_EN_RST# high to enable this regulator. Software controls the output
voltage.
10.6
Voltage Regulator Enable and Reset
A single pin VREG_EN_RST# controls both the regulator enables and the digital reset function. All the
regulators are enabled, except the USB linear regulator, by taking the VREG_EN_RST# pin above 1V.
Software also controls the regulators. The VREG_EN_RST# pin is connected internally to the reset
function and is powered from VDD_HOST, so do not apply voltages above VDD_HOST to the
VREG_EN_RST# pin. The REG_EN_RST# pin is pulled down internally before the software starts. The
VREG_EN_RST# pin is an active low reset. Assert the reset signal for a period >5ms to ensure a full reset.
Note: The regulator enables are released as soon as VREG_EN_RST# is low, so the regulators shut
down. Therefore do not take VREG_EN_RST# low for less than 5ms, as a full reset is not
guaranteed.
Other reset sources are:
Power-on reset
Via a software-configured watchdog timer
A warm reset function is also available under software control. After a warm reset the RAM
data remains available.
10.7
Power Sequencing
CSR recommends that the power supplies are all powered at the same time. The order of powering the
supplies relative to the I/O supply, VDD_PADS to VDD_HOST, is not important. If the I/O supply is powered
before VDD_DIG, all digital I/Os are weak pull-downs irrespective of the reset state.
Americas: +1-800-492-2320 Option 2
Europe: +44-1628-858-940
Hong Kong: +852-2923-0610
www.lairdtech.com/bluetooth
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CONN-GUIDE-BT800_v0_2
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