Dspf_Sp_Fir_R2 - Texas Instruments TMS320C67 DSP Series Programmer's Reference Manual

Benchmarks

DSPF_sp_fir_r2

Function
Arguments
Description
Algorithm
-
A load counter is used so that an epilog is not needed. No extraneous
loads are performed.
-
Endianess: This code is little endian.
-
Interruptibility: This code is interrupt-tolerant but not interruptible.
Cycles (4*floor((nh-1)/2)+14)*(ceil(nr/4)) + 8
for example, nh=10, nr=100, cycles=558 cycles
Code size 640
(in bytes)
Single-precision complex finite impulse response filter
void DSPF_sp_fir_r2 (const float * restrict x, const float * restrict h, float *
restrict r, int nh, int nr)
x[nr+nh-1] Pointer to input array of size nr+nh-1.
h[nh] Pointer to coefficient array of size nh (in reverse order).
r[nr] Pointer to output array of size nr.
nh Number of coefficients.
nr Number of output samples.
Computes a real FIR filter (direct-form) using coefficients stored in vector h[].
The real data input is stored in vector x[]. The filter output result is stored in
vector r[]. The filter calculates nr output samples using nh coefficients. The co-
efficients are expected to be in reverse order.
This is the C equivalent of the assembly code. Note that the assembly code
is hand optimized and restrictions may apply.
void DSPF_sp_fir_r2(const float * x, const float * h,
{
int i, j;
float sum;
for (j = 0; j < nr; j++)
float *restrict r, int nh, int nr)
DSPF_sp_fir_r2
DSPLIB Reference 4-41