Texas Instruments TMS320C67 DSP Series Programmer's Reference Manual page 40

Special Requirements
Implementation Notes
Benchmarks
}
ia += n2;
}
ie <<= 1;
}
}
n is a integral power of 2 and ≥32.
-
-
The FFT Coefficients w are in bit-reversed order
-
The elements of input array x are in normal order
-
The imaginary coefficients of w are negated as {cos(d*0), sin(d*0),
cos(d*1), sin(d*1) ...} as opposed to the normal sequence of {cos(d*0),
-sin(d*0), cos(d*1), -sin(d*1) ...} where d = 2*PI/n.
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x and w are double-word aligned.
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The inner two loops are combined into one inner loop whose loop count
is n/2.
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The prolog has been completely merged with the epilog. But this gives rise
to a problem which has not been overcome. The problem is that the mini-
mum trip count is 32. The safe trip count is atleast 16 bound by the size
of the epilog. In addition because of merging the prolog and the epilog a
data dependency via memory is caused which forces n to be at least 32.
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Endianess: This code is little endian.
-
Interruptibility: This code is interrupt-tolerant but not interruptible.
Cycles (2 * n * log(base-2) n) + 42
For n = 64, Cycles = 810
Code size 1248
(in bytes)
DSPF_sp_cfftr2_dit
DSPLIB Reference 4-15