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Summary of Contents for Texas Instruments Silicon Errata TMS320F28379S
- Page 1 TMS320F28379S, TMS320F28377S, TMS320F28376S, TMS320F28375S, TMS320F28374S Delfino Microcontrollers Silicon Errata Literature Number: SPRZ422D August 2014 – Revised July 2016...
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Page 2: Table Of Contents
PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask ......................Clear ............Known Design Exceptions to Functional Specifications ...................... Documentation Support .......................... Revision History Table of Contents SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... - Page 3 ......................List of Usage Notes ................... Table of Contents for Advisories ......................List of Advisories ..................Memories Impacted by Advisory SPRZ422D – August 2014 – Revised July 2016 List of Figures Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated...
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Page 4: Introduction
Predictions show that prototype devices (TMX or TMP) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used. -
Page 5: Device Markings
100-Pin PZP PowerPAD Thermally Enhanced Thin Quad Flatpack (HTQFP) TECHNOLOGY F = Flash DEVICE 28379S 28377S 28376S 28375S 28374S Figure 2. Example of Device Nomenclature SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 6: Usage Notes And Known Design Exceptions To Functional Specifications
//Enable nesting in the PIE asm(" NOP"); //Wait for PIEACK to exit the pipeline EINT; //Enable nesting in the CPU TMS320F2837xS Delfino™ Microcontrollers SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 7: Known Design Exceptions To Functional Specifications
Advisory — CMPSS: Ramp Generator May Not Start Under Certain Conditions ........Advisory — Boot ROM: Device Will Hang During Boot if X1 Clock Source is not Present SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 8: List Of Advisories
CMPSS: Ramp Generator May Not Start Under Certain Conditions Boot ROM: Device Will Hang During Boot if X1 Clock Source is not Present TMS320F2837xS Delfino™ Microcontrollers SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 9: Advisory - Analog Trim Of Some Tmx Devices
If the internal oscillator trim contains all zeros, the user can adjust the lowest 10 bits of the oscillator trim register between 1 (minimum) and 1023 (maximum) while observing the system clock on the XCLOCKOUT pin. SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 10: Advisory - Adc: Adc Post-Processing Block Limit Compare
The value of 0x7000 is written to memory locations 0x0000 743F, 0x0000 74BF, 0x0000 753F, and 0x0000 75BF (writing this value is only valid when the ADCCLK prescale is a whole number). TMS320F2837xS Delfino™ Microcontrollers SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 11: Single-Ended Input Model
For the revisions affected, when subsequent conversions switch between channel Workaround(s) groups, the S+H duration should be chosen to account for the additional capacitance. SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 12: Advisory - Xrs May Toggle During Power Up
Set the error threshold bit-field (ERR_THRESHOLD.THRESHOLD) to a value greater Workaround(s) than or equal to 1. Note that the default value of the threshold bit-field is 0. TMS320F2837xS Delfino™ Microcontrollers SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 13: Advisory - Epie: Spurious Vcu Interrupt (Epie 12.6) Can Occur When First Enabled
Other options for performing position counter reset, if appropriate for the application [such as Index Event Initialization (IEI)], do not have this issue. SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 14: Advisory - Pll: May Not Lock On The First Lock Attempt
NOTE: The USB Boot Mode does not implement the previous workarounds. Applications using USB Boot will need to implement any retry attempts at the system level. TMS320F2837xS Delfino™ Microcontrollers SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 15: Advisory - Sdfm: Data Filter Output Does Not Saturate At Maximum Value With Sinc3 And Osr = 256
(b) If the number of samples is less than or equal to N, clear the SDIFLG register; otherwise, do not clear the SDIFLG register to prevent further SDFM interrupts. SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 16: Advisory - Sdfm: Comparator Filter Module May Generate Spurious Over-Value And Under-Value Conditions
3. Delay for at least a latency of data filter + 5 SD-Cx clock cycles. 4. Enable the SDFM data filter. TMS320F2837xS Delfino™ Microcontrollers SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 17: Advisory - Fpu: Fpu-To-Cpu Register Move Operation Preceded By Any Fpu 2P Operation
ADDF32 R2H, R2H, R0H || MOV32 *--SP, R2H ; delay slot ; alignment cycle MOV32 @XAR3, R6H ; FPU register read of R6H SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 18: Advisory - Fpu: Luf, Lvf Flags Are Invalid For The Einvf32 And Eisqrtf32 Instructions
SETFLG LUF=0, LVF=0 ; Re-enable PIEIER12.7/8, i.e. re-enable the LUF/LVF interrupts @_PieCtrlRegs.PIEIER12.all, #0x00C0 MOV32 STF,*--SP ; Restore previous status flags TMS320F2837xS Delfino™ Microcontrollers SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... - Page 19 // is the legitimate result of an overflow/underflow // from an FPU operation (not EISQRTF32/EINVF32) // Handle Overflow/Underflow condition // Ack the interrupt and exit SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated...
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Page 20: Memories Impacted By Advisory
MEMORY TYPE ADDRESSES IMPACTED F28375S F28374S 0x0000 07F8–0x0000 07FF GS11 0x0001 7FF8–0x0001 7FFF GS15 0x0001 BFF8–0x0001 BFFF Flash 0x000B FFF8–0x000B FFFF TMS320F2837xS Delfino™ Microcontrollers SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 21: Advisory - Cmpss: Compxlatch May Not Clear Properly Under Certain Conditions
PWM duty cycle to a maximum value that will avoid simultaneous COMPSTS[COMPHSTS] and PWMSYNC assertions. SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 22: Advisory - Boot Rom: Device Will Hang During Boot If X1 Clock Source Is Not Present
Apply external clock source to X1 on silicon revision B devices, even if using INTOSC as Workaround(s) the application clock source. TMS320F2837xS Delfino™ Microcontrollers SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 23: Documentation Support
For more information regarding the TMS320F2837xS Delfino devices, see the following documents: • TMS320F2837xS Delfino™ Microcontrollers Data Manual • TMS320F2837xS Delfino Microcontrollers Technical Reference Manual SPRZ422D – August 2014 – Revised July 2016 TMS320F2837xS Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... -
Page 24: Revision History
SDFM: Dynamically Changing Data Filter Settings Will Trigger Spurious Data ......................Acknowledge Events advisory............• Section 4.2: Added Memory: Prefetching Beyond Valid Memory advisory. Revision History SPRZ422D – August 2014 – Revised July 2016 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated... - Page 25 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
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