Texas Instruments TMS320C67 DSP Series Programmer's Reference Manual page 119

miscellaneous functions 3-7
DSPLIB reference 4-69
most significant bit (MSB), defined C-5
m-law companding, defined C-5
multichannel buffered serial port (McBSP),
defined C-5
multiplexer, defined C-5
N
nonmaskable interrupt (NMI), defined C-6
O
object file, defined C-6
off chip, defined C-6
on chip, defined C-6
overflow and scaling 2-6
P
performance considerations A-2
peripheral, defined C-6
program cache, defined C-6
program memory, defined C-6
PWR, defined C-6
PWR module, defined C-6
Q
Q.3.15 bit fields A-3
Q.3.15 format A-3
R
random-access memory (RAM), defined C-6
rebuilding DSPLIB 2-6
reduced-instruction-set computer (RISC),
defined C-6
register, defined C-6
reset, defined C-6
routines, DSPLIB functional categories 1-2
RTOS, defined C-6
S
service layer, defined C-7
software updates B-2
STDINC module, defined C-7
synchronous dynamic random-access memory
(SDRAM), defined C-7
synchronous-burst static random-access memory
(SBSRAM), defined C-7
syntax, defined C-7
system software, defined C-7
T
tag, defined C-7
testing, how DSPLIB is tested 2-5
timer, defined C-7
TIMER module, defined C-7
U
using DSPLIB 2-4
W
word, defined C-7
Index
Index-3