Allen-Bradley ControlNet PLC-5 User Manual page 140

4 Index
Publication 1785-UM022B-EN-P - February 2002
I
I/O
2-1
ControlNet
automatic mapping 2-16
discrete I/O data transfer mapping
2-19
files configured with map
Data Input File (DIF) 2-18, 2-19
Data Output File (DOF) 2-18,
2-19
Default Configuration File 2-18
I/O Status File 2-18
I/O forcing 2-7
immediate data transfer 2-8
map table
creating 2-16
entries 2-16
maximum number of entries
2-18
mapping 2-16
mapping data transfers 2-18
non-discrete I/O data transfer
mapping 2-19, 2-20
reserving rack space for remote I/O
linked racks before
mapping 2-16
scheduled data transfer 2-2
scheduled operations
discrete I/O data transfer 2-4
non-discrete I/O data transfer
2-4
peer-to-peer communication
2-4
unscheduled
I/O datatransfer instructions
4-3
immediate data I/O instructions
4-6
Message instruction 2-7, 4-1,
C-1
non-discrete I/O data transfers
2-6, C-1
non-discrete I/O data transfer
instructions 4-3
unscheduled data transfer 2-4
unscheduled non-discrete I/O data
transfer 2-4
unscheduled operations
messaging from programming
devices 2-4
non-discrete I/O data transfer
2-4
peer-to-peer messaging 2-4
3-2
I/O configuration utility
2-7
I/O forcing
I/O map table
P-2
definition of
I/O map entry status words
I/O mapping techniques
5-3
I/O status indicator
2-9
IDI
2-9
IDO
2-9
IIN
Immediate Data Input (IDI) instruction
C-2
Immediate Data Output (IDO) instruction
C-2
immediate data transfer operations
immediate I/O
2-9
process
D-2
immediate inhibit bit
Immediate Input (IIN) instruction
Immediate Output (IOT) instruction
indicators
1-3
PLC-5/20C
1-4
PLC-5/40C
D-2
inhibit bit
installed memory card type
using status to determine
installing keying bands for the processor
1-10
installing your processor
checking your processor package
connecting a programming terminal
1-19
ControlNet connection 1-21
DH+ connection 1-19
serial channel 1-20
connecting to a ControlNet network
1-17
identifying the components of the
1-3
processor
1-15
installing a DH+ link
installing a remote I/O link
installing keying bands for the processor
1-10
installing the processor in the chassis
1-13
D-1
2-21
2-8
2-9
2-9
B-14
1-5
1-13