Figure 6-5.
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
t
SU.STA
SDA IN
SDA OUT
Figure 6-6.
Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th bit
WORDn
Note:
1.
The write cycle time t
clear/write cycle.
AT24C16C [DATASHEET]
8
Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016
t
HIGH
t
F
t
LOW
t
t
HD.STA
HD.DAT
t
AA
ACK
Stop
Condition
is the time from a valid Stop Condition of a Write sequence to the end of the internal
WR
t
LOW
t
SU.DAT
t
DH
(1)
t
WR
Start
Condition
t
R
t
SU.STO
t
BUF
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