Target Decode Speed; Target Fast-Back-To-Back Capability; Resource Locking; Pci Interrupts - National Instruments MXI-2 Reference Manual

Appendix A Specifications for PXI-8320
Environmental
Requirements
Physical
MXI-2 Configuration Reference Manual
Target decode speed ...............................medium (one clock)
Target fast-back-to-back capability ........supported
Resource locking ....................................supported as a master and slave
PCI interrupts..........................................interrupts passed on
Base address registers .............................BAR 0 dedicated to local registers
Expansion ROM .....................................8 KB
PCI master performance
(ideal maximum).....................................132 Mbytes/s
PCI slave performance
(ideal maximum).....................................33 Mbytes/s (to local registers)
Temperature............................................0 to 55 °C operating;
Relative humidity ...................................0 to 95% noncondensing,
EMI .........................................................FCC Class A verified
Memory space.........................................32 KB minimum, programmable
Board dimensions ...................................160 mm by 100 mm
Connectors ..............................................single fully implemented
INTA# signal
BAR 1–3 size configurable from
256 B to 4 GB
(16 Dwords maximum)
–40 to 85 °C storage
operating; 0 to 95%
noncondensing, storage
(6.3 by 3.94 in.)
MXI-2 connector
A-8 ni.com