Osd Blending - Analog Devices ADV8005 Hardware Reference Manual

UG-707
OSD Blend: Used to overlay the OSD data with the input video.
OSD Scaler: Used to scale the OSD to the target resolution.
CSC: Used to convert the OSD core data color to the same color space as that of the input video.
OSD Core: Used to generate internal OSD data. Reads data from DDR2 memory and outputs data to FIFO.
SPI Master and SPI Slave: SPI master used to copy flash data into DDR2 memory. SPI slave used as the only means to control OSD configuration
registers and memories.
4.2.3.

OSD Blending

The OSD core in the ADV8005
The two video inputs allow two different video streams to be connected to the OSD core, for example, video TTL input channel and SVSP output.
The inputs connected to the OSD core can be selected using
details. The video stream connected to OSD input 1 is output to the OSD blend 1 output and the video stream connected to OSD input 2 is
output to the OSD blend 2 output. It is only possible to blend video on OSD blend 1 output or on OSD blend 2 output. It is not possible to OSD
blend on both at the same time.
The OSD can be blended onto either one of the two video streams connected to the OSD core, that is, there is only one source of OSD data and
it must be configured to match one video stream's format and timing at a time. The OSD can be switched between the two video streams without
causing any disturbance on either output video stream. The OSD core outputs can be connected to one or more of the output blocks, for example,
HDMI TX1, HDMI TX2, SD encoder and HD encoder.
The OSD is blended with the selected video stream using alpha blending. This means that each pixel of OSD has its own blending parameter
which is used to blend this pixel with its corresponding background video. If the OSD data is transparent, the background video will be passed
through and unadjusted.
As shown in Figure 82, the OSD data needs to be scaled to the target resolution before getting into the blending block (refer to Section 4.2.7).
The clock and DE of the selected video stream are used to read the scaler output data. Delay is added to DATA, DE, HS and VS for matching the
delay of the OSD processing, so the OSD scaler can ensure the correct synchronization of OSD data and input video data.
SPI Master/ SPI Master/
Microcontroller/ Microcontroller/
Flash Flash
Video Input 1 Video Input 1
Video Input 2 Video Input 2
Figure 82: Bitmap OSD Top Level Diagram
has two video inputs and two video outputs and is capable of blending at data rates of up to 3 GHz.
osd_blend_inp_sel[3:0]
ADV8005 Hardware Reference Manual
DDR2 DDR2
Memory Memory
OSD OSD
Slave Slave Core Core
CSC CSC
OSD OSD
Scaler Scaler
OSD OSD
Blend Blend
and osd_blend_inp_2_sel[3:0]. Refer to
Rev. A | Page 168 of 317
OSD TTL Input
External OSD
Core
OSD
Internally
OSD
Generated
Core
OSD
Blended Output 1 Blended Output 1
Blended Output 2 Blended Output 2
Figure 25 for further