Analog Devices ADV8005 Hardware Reference Manual page 3

Video signal processor
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ADV8005 Hardware Reference Manual
2.1.14.
Mode 13 - OSD from HDMI RX ..................................................................................................................................... 40
2.1.15.
Mode 14 - Handling Triple Inputs ................................................................................................................................... 41
2.2.
ADV8005 Top Level Overview ..................................................................................................................................... 41
2.2.1.
Video Muxing ...................................................................................................................................................................... 41
2.2.2.
Digital Video Input ............................................................................................................................................................. 45
2.2.2.1.
Video TTL Input ................................................................................................................................................................................... 46
2.2.2.2.
EXOSD TTL Input ................................................................................................................................................................................ 46
2.2.2.3.
TTL Output ........................................................................................................................................................................................... 46
2.2.2.4.
Treatment o f Unused TTL Inputs ..................................................................................................................................................... 48
2.2.2.5.
Serial Video Rx ...................................................................................................................................................................................... 52
2.2.2.6.
Primary Input Channel ........................................................................................................................................................................ 52
2.2.2.7.
Secondary Input Channel .................................................................................................................................................................... 57
2.2.2.8.
RX Input Channel ................................................................................................................................................................................. 61
2.2.3.
Updither Configuration ..................................................................................................................................................... 62
2.2.4.
Clock Configuration ........................................................................................................................................................... 62
2.2.4.1.
PVSP Output Timing ........................................................................................................................................................................... 66
2.2.4.2.
SVSP Output Timing ............................................................................................................................................................................ 67
2.2.4.3.
Frame Tracking ..................................................................................................................................................................................... 67
2.2.5.
DDR2 Interface ................................................................................................................................................................... 68
2.2.5.1.
DDR2 Configuration ............................................................................................................................................................................ 69
2.2.5.2.
DDR2 Bandwidth and Memory Selection ........................................................................................................................................ 70
2.2.5.3.
Single DDR2 Memory Configuration ................................................................................................................................................ 72
2.2.5.4.
DDR2 Loopback Test ........................................................................................................................................................................... 72
2.2.6.
C Auto Increment............................................................................................................................................................. 73
2
2.2.7.
SPI Loop Through .............................................................................................................................................................. 74
2.2.8.
VBI Data Insertion ............................................................................................................................................................. 74
2.2.8.1.
Extraction Overview ............................................................................................................................................................................ 74
2.2.8.2.
Ancillary Data Extraction .................................................................................................................................................................... 74
2.2.8.3.
SPI Data Extraction .............................................................................................................................................................................. 75
2.2.8.4.
VBI Data Delay ..................................................................................................................................................................................... 75
2.2.9.
Resets .................................................................................................................................................................................... 76
2.2.10.
Image Processing Colorimetry Breakdown .................................................................................................................... 78
2.2.11.
AV-Codes ............................................................................................................................................................................. 79
2.2.12.
Color Space Conversion ..................................................................................................................................................... 83
2.2.12.1.
Primary Input Channel CSC ......................................................................................................................................................... 83
2.2.12.2.
Secondary Input Channel CSC ..................................................................................................................................................... 86
2.2.12.3.
RX Input Channel CSC .................................................................................................................................................................. 89
2.2.12.4.
TTL Output CSC ............................................................................................................................................................................ 92
2.2.12.5.
HDMI Transmitter CSCs ............................................................................................................................................................... 95
2.2.13.
VGA Position and Phase Information ............................................................................................................................. 98
2.2.14.
ADV8005 Silicon Revision ................................................................................................................................................ 103
2.2.15.
System Configuration ......................................................................................................................................................... 103
3.
Video Signal Processing .......................................................................................................................................... 104
3.1.
Introduction .................................................................................................................................................................... 104
3.2.
Primary VSP .................................................................................................................................................................... 104
3.2.1.
Introduction to PVSP ......................................................................................................................................................... 104
3.2.1.1.
Autoconfiguration ................................................................................................................................................................................ 105
3.2.1.2.
Customized Input/Output Video Format Configuration ............................................................................................................... 107
3.2.1.3.
Field/Frame Buffer Number ................................................................................................................................................................ 108
Rev. A | Page 3 of 317
UG-707

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