Spi_Rx Register - Texas Instruments CC3200 Technical Reference Manual

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8.6.1.10 SPI_RX Register (offset = 13Ch) [reset = 0h]
SPI_RX is shown in
This register contains a single SPI word received through the serial link, depending on SPI word length.
See Chapter Access to data registers for the list of supported accesses; the little endian host accesses the
SPI 8-bit word on 0x00, while the big endian host accesses it on 0x03.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Bit Field
31-0 RDATA
SWRU367D – June 2014 – Revised May 2018
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Figure 8-28 and described in
Figure 8-28. SPI_RX Register
Table 8-16. SPI_RX Register Field Descriptions
Type Reset
R 0h
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Table 8-16.
RDATA
R-0h
Description
Channel received data
SPI Registers
9 8 7 6 5 4 3 2
SPI (Serial Peripheral Interface)
1 0
283