Siemens S7-1200 System Manual page 868

Technical specifications
A.5 CPU 1215C
Technical data
On-board analog I/O
Process image size
Bit memory (M)
Temporary (local) memory
Signal modules expansion
SB, CB, BB expansion
Communication module expansion
High-speed counters
Pulse outputs
2
Pulse catch inputs
Time delay interrupts
Cyclic interrupts
Edge interrupts
Memory card
Real time clock accuracy
Real time clock retention time
The slower speed is applicable when the HSC is configured for quadrature mode of operation.
1
For CPU models with relay outputs, you must install a digital signal board (SB) to use the pulse outputs.
2
Table A- 68 Performance
Type of instruction
Boolean
Move Word
Real math
868
Description
2 inputs/2 outputs
1024 bytes of inputs (I)/1024 bytes of outputs (Q)
8192 bytes
16 Kbytes for startup and program cycle (including associated FBs and FCs)
•
6 Kbytes for each of the other interrupt priority levels (including FBs and FCs)
•
8 SMs max.
1 max.
3 CMs max.
Up to 6 configured to use any built-in or SB inputs. See table CPU 1215C: HSC
default address assignments
100/ 80 kHz (Ia.0 to Ia.5)
•
1
20 kHz (Ia.6 to Ib.5)
30/
• 1
Up to 4 configured to use any built-in or SB outputs
100 kHz (Qa.0 to Qa.3)
•
30 kHz (Qa.4 to Qb.1)
•
14
4 total with 1 ms resolution
4 total with 1 ms resolution
12 rising and 12 falling (16 and 16 with optional signal board)
SIMATIC Memory Card (optional)
+/- 60 seconds/month
20 days typ./12 days min. at 40 °C (maintenance-free Super Capacitor)
Execution speed
0.08 μs/instruction
1.7 μs/instruction
2.3 μs/instruction
S7-1200 Programmable controller
System Manual, 03/2014, A5E02486680-AG