Table of Contents
Advertisement
3.2.3.8 LVDS Flat Panel signals
®
The Intel
Atom Cedarview family of CPUs offer a native single channel 18-/24-bit LVDS interface (18-bit only with N2xx CPUs).
This interface is carried out directly on Qseven
Signals involved in management of LVDS display are the following:
LVDS_A0+/LVDS_A0-: LVDS Channel differential data pair #0.
LVDS_A1+/LVDS_A1-: LVDS Channel differential data pair #1.
LVDS_A2+/LVDS_A2-: LVDS Channel differential data pair #2.
LVDS_A3+/LVDS_A3-: LVDS Channel differential data pair #3.
LVDS_A_CLK+/LVDS_A_CLK-: LVDS Channel differential clock.
LVDS_PPEN: Panel Power Enable signal, +3.3V_S electrical level Output with 100kΩ pull-down resistor. It can be used to turn On/Off the connected LVDS
display.
LVDS_BLEN: Panel Backlight Enable signal, +3.3V_S electrical level output with 100kΩ pull-down resistor. It can be used to turn On/Off the backlight's lamps of
connected LVDS display.
LVDS_BLT_CTRL: this signal can be used to adjust the panel backlight brightness in displays supporting Pulse Width Modulated (PWM) regulations.
LVDS_DID_DAT: DisplayID DDC Data line for LVDS flat Panel detection. Bidirectional signal, electrical level +3.3V_S with a 2k2Ω pull-up resistor.
LVDS_DID_CLK: DisplayID DDC Clock line for LVDS flat Panel detection. Bidirectional signal, electrical level +3.3V_S with a 2k2Ω pull-up resistor.
QuadMo747-x2000
QuadMo747-x2000 User Manual - Rev. First Edition: 1.0 - Last Edition: 2.0 - Author: S.B. - Reviewed by G.G. Copyright © 2014 SECO S.r.l.
®
golden edge connector, on the pins reserved for first channel LVDS..
35
Advertisement
Table of Contents
