Mitsubishi Electric QD62 User Manual page 23

Melsec system q, programmable logic controller, high-speed counter module, gx configurator-ct
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3 SPECIFICATIONS
Device No.
CH1
CH2
PLC CPU
Coincidence signal No. 1 reset
Y00
Y08
command
Y01
Y09 Preset command
Coincidence signal enable
Y02
Y0A
command
Y03
Y0B Down count command
Y04
Y0C Count enable command
External preset detection reset
Y05
Y0D
command
Counter function selection start
Y06
Y0E
command
Coincidence signal No. 2 reset
Y07
Y0F
command
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(2) Output signals
Signal name
QD62 (E/D)
REMARK
The symbols used in the operation timing column signify the following:
......... Enabled while the signal is in ON status.
......... Enabled at signal rise (from OFF to ON).
Operation timing
Turns ON when the counter value coincidence (point
No. 1) signal (X02/X09) is reset.
Turns ON when the preset function is executed.
Turns ON when the counter value coincidence signal
(X02/X09, X06/X0D) is output to the external terminal.
Turns ON when a subtraction count is executed in the
1 phase pulse input mode.
Turns ON when the count operation is performed.
Turns ON when the external preset request detection
signal (X04/X0B) is reset.
Turns ON when counter function selection is
executed.
• Latch counter function
• Sampling counter function
• Count disable function
• Periodic pulse counter function
Turns ON when the counter value coincidence (point
No. 2) signal (X06/X0D) is reset.
MELSEC-Q
Description
3 - 7

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