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1 OVERVIEW
1 OVERVIEW
This User's Manual describes the specifications, handling and programming method
for the QD62, QD62E and QD62D high-speed counter modules (QD62 (E/D)) used
together with the MELSEC-Q series CPUs.
The QD62(E/D) modules are available with the following I/O types, maximum counting
speeds and number of channels.
The QD62(E/D) modules have the following input methods for 1 phase/2 phase pulse input:
• Phase 1 pulse input multiple of 1 • Phase 1 pulse input multiple of 2 • CW/CCW
• Phase 2 pulse input multiple of 1 • Phase 2 pulse input multiple of 2
• Phase 2 pulse input multiple of 4
See Section 5.1 for details on the input methods.
An overview of QD62 (E/D) operation is shown in the figure below.
1) Counts the pulses to be input to the QD62 (E/D).
2) Preset or counter function can be selected with an external control signal.
3) The present count value and the coincidence output point setting value can be
4) Using the sequence program, the I/O signal and buffer memory status of the
1 - 1
Item
DC input sinking
I/O type
Maximum counting
speed
Number of channels
Pulse
Pulse generator
Encoder
External
control signal
Controller
Preset counter
function selection
Pulse
Pulse generator
Encoder
External
control signal
Controller
Preset counter
function selection
compared to output a coincidence signal.
QD62 (E/D) can be verified.
Also, count start/stop, preset, and counter function can be selected.
QD62
QD62E
DC input sourcing
output
output
200 kPPS
2 channels
4) I/O signal
Buffer memory
read/write
QD62(E/D)
1)
CH1
3) Coincidence signal output (2 points)
2)
3)
CH2
3) Coincidence signal output (2 points)
4)
MELSEC-Q
QD62D
Differential input
sinking output
500 kPPS
PLC CPU
QCPU (Q mode)
1 - 1
1
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