Final Xyz Amplifier A2; Description A2-200 Mhz Version - Fluke PM3082 Service Manual

UNIT DESCRIPTIONS
5.2

FINAL XYZ AMPLIFIER A2

5.2.1

Description A2-200 MHz version

5.2.1.1 Final Y am plifier
Diagram 1
The output signal from the delay line is applied to the input pins 6 and 9 of amplifier IC D1001. This
IC and surrounding components comprise the MF and HF square wave compensations. Also the
vertical CRT text signal is applied to D1001 (pin 15 and 16). The switching between text/cursors and
signal is done via control signals that are applied to pin 17 and 18 of D1001. Text is written if the
voltage at pin 18 is higher than at pin 17. This switching signal is derived from the collector of the
transistors V1201 and V1202. The control signals XYSW1 and XYSWO come from the text/cursor
generator IC on microprocessor unit A3. Via the transistors V1203 and V1204 similar switching
signals XSW1 and XSWO are routed to the X-deflection section for switching between text and signal.
The output signals from pin 21 and 22 of D1001 are routed to the final Y-amplifier that drives the
vertical deflection plates of the CRT. This final stage is indicated on the next diagram.
The delay line leads are terminated into 50£2. The impedance is composed by 300Q inside D1001
parallelled by external impedances of 60Q formed by the external resistors R1024/R1026 and
R1027/R1028. All termination resistors are applied to a voltage controlled by D1001/pin 13. Pin 13
determines the common mode voltage level of the D1001 inputs. The HF square wave compensation
is achieved by the two dual varicap diodes V1009 and V1011 together with associated resistors. A
fixed mid- frequency compensation network is formed by C1006 and associated resistors.
Varicap V1009 is controlled by the output signal at pin 20 of octal DAC N1001. This output voltage
can be in the range 0 to 10 V and controls varicap V1009 via operational amplifier N1002/1,2,3. This
operational amplifier converts the N1001 output voltage (that is related to 0 V) into a voltage related
to the voltage at D1001/pin 13.
Varicap V1011 is controlled by the output signal at pin 18 of octal DAC N1001. This output voltage
can be in the range 0 to 10 V and controls varicap V1011 via operational amplifier N1002/5,6,7. This
operational amplifier converts the N1001 output voltage (that is related to 0 V) into a voltage related
to the voltage at D1001/pin 13.
LF square wave compensation is also done inside D1001. This is controlled via currents applied to
pin 27 and 28. These currents are derived from the N1001 DAC voltage outputs 13 and 11 via the
transistors V1014 and V1016. The actual compensating components are situated outside D1001 and
are R1037/C1011/R1038 and R1029/C1009/R1031. V1023 and V1024 form a 20 mA current source
to supply the bias current for the final stage inside D1001. V1024 is switched as a diode and gives
temperature compensation.
Offset is adjusted via the currents from the collectors of V1021 and V1022. These currents are
controlled by the DAC output pins 17 (Most Significant DAC) and 16 (Least Significant DAC). Two
parallel DAC outputs are used to obtain sufficient resolution. V1018 is a current source and V1019 is
for temperature compensation. Gain control occurs via an adjustable current applied to D1001/pin
26. This is done via N1001/pin 14 and R1051
DAC output N1001/15 applies via operational amplifier N1003/1,2,3 the signal YFSHF to the final
stage on the next diagram. YFSHF is an adjustable dc voltage that is applied to varicap diodes that
control the HF square wave response.
Diagram 2
This diagram shows the push-pull output amplifier. The input signal is a current and the output signal
is a voltage. The output signal is applied to the vertical upper and lower plates of the CRT. The total
sensitivity at the plates is 4V/div. One plate is driven by push-pull stage V1106/V1111. The driver
transistors are V1102 and V1103. The input signal is YPREOUT1.
5.2-1