Intel 80C186EB Manual page 50

80C186EB 80C188EB 80L186EB 80L188EB
NOTES
1 READY must be low by either edge to cause a wait state
2 Lighter lines indicate READ cycles darker lines indicate WRITE cycles
Pin names in parentheses apply to 80C188EB 80L188EB
50
Figure 22 Refresh during Hold Acknowledge
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