Relative Timings - Intel 80C186EB Manual

80C186EB 80C188EB 80L186EB 80L188EB
AC SPECIFICATIONS

Relative Timings

(80C186EB25 20 13 80L186EB16 13 8)
Symbol
RELATIVE TIMINGS
T ALE Rising to ALE Falling
LHLL
T Address Valid to ALE Falling
AVLL
T Chip Selects Valid to ALE Falling
PLLL
T Address Hold from ALE Falling
LLAX
T ALE Falling to WR Falling
LLWL
T ALE Falling to RD Falling
LLRL
T WR Rising to ALE Rising
WHLH
T Address Float to RD Falling
AFRL
T RD Falling to RD Rising
RLRH
T WR Falling to WR Rising
WLWH
T RD Rising to Address Active
RHAV
T Output Data Hold after WR Rising
WHDX
T WR Rising to Chip Select Rising
WHPH
T RD Rising to Chip Select Rising
RHPH
T CS Inactive to CS Active
PHPL
T ONCE Active to RESIN Rising
OVRH
T ONCE Hold from RESIN Rising
RHOX
NOTES
1 Assumes equal loading on both pins
2 Can be extended using wait states
3 Not tested
36
(Continued)
Parameter Min Max
T 15
b
T 10
b
T 10
b
T 10
b
T 15
b
T 15
b
T 10
b
0
(2 T) 5
b
(2 T) 5
b
T 15
b
T 15
b
T 10
b
T 10
b
T 10
b
T
T
Units Notes
ns
ns
ns 1
ns
ns 1
ns 1
ns 1
ns
ns 2
ns 2
ns
ns
ns 1
ns 1
ns 1
ns 3
ns 3