Intel 80C186EB Manual page 20

16-bit high-integration embedded processors
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80C186EB 80C188EB 80L186EB 80L188EB
AD Bus
AD0
47
AD1
52
AD2
54
AD3
56
AD4
58
AD5
60
AD6
62
AD7
64
AD8 (A8)
48
AD9 (A9)
53
AD10 (A10)
55
AD11 (A11)
57
AD12 (A12)
59
AD13 (A13)
61
AD14 (A14)
63
AD15 (A15)
65
A16
66
A17
67
A18
68
A19 ONCE
69
1
HLDA
2
HOLD
3
TEST
4
LOCK
5
NMI
6
READY
7
P1 7 GCS7
8
P1 6 GCS6
9
P1 5 GCS5
10
V
SS
11
V
CC
12
P1 4 GCS4
13
P1 3 GCS3
14
P1 2 GCS2
15
P1 1 GCS1
16
P1 0 GCS0
17
LCS
18
UCS
19
INT0
20
INT1
NOTE
Pin names in parentheses apply to the 80C188EB 80L188EB
20
Table 8 SQFP Pin Functions with Location
Bus Control
ALE
75
BHE
(RFSH )
76
S0
79
S1
78
S2
77
RD
73
WR
74
READY
6
DEN
80
LOCK
4
HOLD
2
HLDA
1
Table 9 SQFP Pin Locations with Pin Names
21
INT1 INTA0
22
INT3 INTA1
23
INT4
24
PDTMR
25
RESIN
26
RESOUT
27
OSCOUT
28
CLKIN
29
V
CC
30
V
SS
31
CLKOUT
32
T0OUT
33
T0IN
34
T1OUT
35
T1IN
36
P2 7
37
P2 6
38
CTS0
39
TXD0
40
RXD0
Processor Control
RESIN
25
RESOUT
26
CLKIN
28
OSCOUT
27
CLKOUT
31
TEST
BUSY
3
NMI
5
INT0
19
INT1
20
INT2 INTA0
21
INT3 INTA1
22
INT4
23
PDTMR
24
Power and Ground
V
11
CC
V
29
CC
V
50
CC
V
71
CC
V
10
SS
V
30
SS
V
49
SS
V
51
SS
V
70
SS
V
72
SS
41
P2 5 BCLK0
42
P2 3 SINT1
43
P2 4 CTS1
44
P2 0 RXD1
45
P2 1 TXD1
46
P2 2 BCLK1
47
AD0
48
AD8 (A8)
49
V
SS
50
V
CC
51
V
SS
52
AD1
53
AD9 (A9)
54
AD2
55
AD10 (A10)
56
AD3
57
AD11 (A11)
58
AD4
59
AD12 (A12)
60
AD5
I O
UCS
18
LCS
17
P1 0 GCS0
16
P1 1 GCS1
15
P1 2 GCS2
14
P1 3 GCS3
13
P1 4 GCS4
12
P1 5 GCS5
9
P1 6 GCS6
8
P1 7 GCS7
7
P2 0 RXD1
44
P2 1 TXD1
45
P2 2 BCLK1
46
P2 3 SINT1
42
P2 4 CTS1
43
P2 5 BCLK0
41
P2 6
37
P2 7
36
CTS0
38
TXD0
39
RXD0
40
T0IN
33
T1IN
35
T0OUT
32
T1OUT
34
61
AD13 (A13)
62
AD6
63
AD14 (A14)
64
AD7
65
AD15 (A15)
66
A16
67
A17
68
A18
69
A19 ONCE
70
V
SS
71
V
CC
72
V
SS
73
RD
74
WR
75
ALE
76
BHE
(RFSH )
77
S2
78
S1
79
S0
80
DEN

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