External
trigger
(TnTG)
PA0 to PA2
PB0 to PB7
External
trigger
(TnTG)
PA0 to PA2
PB0 to PB7
CMP0
CMP1
TMnCON0
TMnCON1
TMnCON2
TMnCON3
TMmD, TMnD : Timer data register
TMmC, TMnC : Timer counter register
CMP0/CMP1 : Comparator output
FEUL610Q111
Write TMnC
TMnCON2
CMP0
TMnCON3
CMP1
LSCLK
TMnCON0
HTBCLK
TMnCON1
PLLCLK
Data bus
(c) In 8-bit Timer Mode (Timer E, F)
Write TMnC
Write TMmC
TMnCON2
TMnCON3
LSCLK
TMnCON0
HTBCLK
TMnCON1
PLLCLK
Read TMnC
Data bus
(d) In 16-bit Timer Mode (Timer E, F)
: Timer control register 0
: Timer control register 1
: Timer control register 2
: Timer control register 3
Figure 8-1(2/2) the configuration of timers
ML610Q111/ML610Q112 User's Manual
Matched
Comparator
8
TnCK
R
TMnC
8
Matched
OUT
16
8
TnCK
R
R
TMnC
8
Chapter 8 Timers
TMnINT
TMFNEG
PA1/TMFOUT
OUT
PC3/TMFOUT
8
TMnD
n=E,F
8
TMmINT
TMFNEG
PA1/TMFOUT
PC3/TMFOUT
Comparator
8
8
TMmC
TMnD
TMmC latch
8
8
n=E
m=F
16
8
TMmD
8
8-3