MC9S12DT256 Device User Guide — V03.07
SS
(INPUT)
SCK
(CPOL = 0)
(INPUT)
SCK
(CPOL = 1)
(INPUT)
MISO
see
note
(OUTPUT)
7
MOSI
(INPUT)
NOTE: Not defined!
In Table A-20 the timing characteristics for slave mode are listed.
Num
Characteristic
1
SCK Frequency
1
SCK Period
2
Enable Lead Time
3
Enable Lag Time
4
Clock (SCK) High or Low Time
5
Data Setup Time (Inputs)
6
Data Hold Time (Inputs)
7
Slave Access Time (time to data active)
8
Slave MISO Disable Time
9
Data Valid after SCK Edge
10
Data Valid after SS fall
11
Data Hold Time (Outputs)
12
Rise and Fall Time Inputs
13
Rise and Fall Time Outputs
NOTES:
1. t
added due to internal synchronization delay
bus
122
1
2
4
4
9
SLAVE
MSB OUT
5
6
MSB IN
Figure A-9 SPI Slave Timing (CPHA=1)
Table A-20 SPI Slave Mode Timing Characteristics
12
13
12
13
11
BIT 6 . . . 1
SLAVE LSB OUT
BIT 6 . . . 1
Symbol
Min
f
DC
sck
t
4
sck
t
4
lead
t
4
lag
t
4
wsck
t
8
su
t
8
hi
t
—
a
t
—
dis
t
—
vsck
t
—
vss
t
20
ho
t
—
rfi
t
—
rfo
3
8
LSB IN
Typ
Max
—
1/4
∞
—
—
—
—
—
—
—
—
—
—
—
—
20
—
22
1
—
30 + t
bus
1
—
30 + t
bus
—
—
—
8
—
8
Unit
f
bus
t
bus
t
bus
t
bus
t
bus
ns
ns
ns
ns
ns
ns
ns
ns
ns